‪Dr. Harsha M V‬ - ‪Google Učenjak‬

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Dr. B.P. HarishProfessor and Chairman, Dept. of ECE, University VisvesvarayaPreverjeni e-poštni naslov na ieee.org

Dr. Harsha M V

Dr. Harsha M V

Guest Faculty, ECE, UVCE, Bangalore

Preverjeni e-poštni naslov na uvce.ac.in

Analog VLSI Soft Computation


Naslov Razvrsti po navedbah Razvrsti po letniku Razvrsti po naslovu	Navedeno Navedeno	Leto
Artificial Neural Network Model for Design Optimization of 2-stage Op-amp BPH Harsha M V 24th International Symposium on VLSI Design and Test (VDAT), 2020	15	2020
An integrated maxFit genetic algorithm-SPICE framework for 2-Stage Op-Amp design automation MV Harsha, BP Harish 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 170-174, 2018	12	2018
AMSDAT: Integrated analog and mixed-signal design optimization framework for SoC applications HM Venkataswamy, BP Harish 2021 IEEE 18th India Council International Conference (INDICON), 1-6, 2021	1	2021
Design Automation of 2 Stage CMOS Op-Amp using PSO Algorithm TKJH M V International Journal for Research in Applied Science & Engineering …, 2024		2024
Integrated AWA Fitness PSO-SPICE Framework for Automated Design and Optimisation of Analogue and Mixed-signal ICs HMVBP Harish International Journal of Artificial Intelligence and Soft Computing 8 (2 …, 2024		2024
PARALLEL CHARGING SYSTEM FOR EV’S HMV K. J., Thanmay International Journal of Engineering Applied Sciences and Technology 7 (5 …, 2022		2022

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