| Maximizing the execution rate of low criticality tasks in mixed criticality system M Jan, L Zaourar, M Pitel Proc. WMC, RTSS, 43-48, 2013 | 80 | 2013 |
| Approximation algorithm for scheduling a chain of tasks on heterogeneous systems M Ait Aba, L Zaourar, A Munier European Conference on Parallel Processing, 353-365, 2017 | 29 | 2017 |
| Co-simulation of a model predictive control system for automotive applications C Bernardeschi, P Dini, A Domenici, A Mouhagir, M Palmieri, S Saponara, ... International Conference on Software Engineering and Formal Methods, 204-220, 2021 | 20 | 2021 |
| Multilevel simulation-based co-design of next generation HPC microprocessors L Zaourar, M Benazouz, A Mouhagir, F Jebali, T Sassolas, JC Weill, ... 2021 International Workshop on Performance Modeling, Benchmarking and …, 2021 | 14 | 2021 |
| 3DIP: An iterative partitioning tool for monolithic 3D IC G Berhault, M Brocard, S Thuries, F Galea, L Zaourar 2016 IEEE International 3D Systems Integration Conference (3DIC), 1-5, 2016 | 12 | 2016 |
| Handling criticality mode change in time-triggered systems through linear programming M Jan, L Zaourar, V Legout, L Pautet Ada User Journal 35 (2), 133-137, 2014 | 12 | 2014 |
| Efficient algorithm for scheduling parallel applications on hybrid multicore machines with communications delays and energy constraint M Ait Aba, L Zaourar, A Munier Concurrency and Computation: Practice and Experience 32 (15), e5573, 2020 | 11 | 2020 |
| Approximation algorithm for scheduling applications on hybrid multi-core machines with communications delays MA Aba, L Zaourar, A Munier 2018 IEEE International Parallel and Distributed Processing Symposium …, 2018 | 11 | 2018 |
| A complete methodology for determining memory BIST optimization under wrappers sharing constraints L Zaourar, Y Kieffer, A Wenzel 2011 3rd Asia Symposium on Quality Electronic Design (ASQED), 46-53, 2011 | 10 | 2011 |
| Task management on fully heterogeneous micro‐server system: Modeling and resolution strategies L Zaourar, M Ait Aba, D Briand, JM Philippe Concurrency and Computation: Practice and Experience 30 (23), e4798, 2018 | 8 | 2018 |
| Multi-start simulated annealing for partially-reconfigurable FPGA floorplanning F Galea, S Carpov, L Zaourar 2018 IEEE International Parallel and Distributed Processing Symposium …, 2018 | 8 | 2018 |
| Modeling of Applications and Hardware to Explore Task Mapping and Scheduling Strategies on a Heterogeneous Micro-Server System. JMP Lilia Zaourar, Massinissa Ait Aba, David Briand IPDPS HCW Workshops 2017, 65-76, 2017 | 7* | 2017 |
| A-DECA: an Automated Design space Exploration approach for Computing Architectures to develop efficient high-performance many-core processors L Zaourar, A Chillet, JM Philippe 2023 26th Euromicro Conference on Digital System Design (DSD), 756-763, 2023 | 6 | 2023 |
| Decoupling processor and memory hierarchy simulators for efficient design space exploration F Jebali, O Matoussi, A Wicaksana, A Charif, L Zaourar System Engineering for constrained embedded systems, 47-52, 2022 | 6 | 2022 |
| A Graph‐Based Approach to Optimal Scan Chain Stitching Using RTL Design Descriptions L Zaourar, Y Kieffer, C Aktouf VLSI Design 2012 (1), 312808, 2012 | 6 | 2012 |
| An innovative methodology for scan chain insertion and analysis at RTL L Zaourar, Y Kieffer, C Aktouf 2011 Asian Test Symposium, 66-71, 2011 | 5 | 2011 |
| Optimisation du partage de blocs BIST pour filetest des mémoires d’un circuit intégré L Zaourar, JA Chentoufi, Y Kieffer, A Waserhole Laboratory G-SCOP, 2010 | 5 | 2010 |
| Cross-level co-simulation and verification of an automatic transmission control on embedded processor C Bernardeschi, A Domenici, M Palmieri, S Saponara, T Sassolas, ... Software Engineering and Formal Methods. SEFM 2020 Collocated Workshops …, 2021 | 4 | 2021 |
| A hypergraph model and associated optimization strategies for path length-driven netlist partitioning J Rodriguez, F Galea, F Pellegrini, L Zaourar International Conference on Computational Science, 652-660, 2023 | 3 | 2023 |
| A multi-objective optimization for memory BIST sharing using a genetic algorithm L Zaourar, Y Kieffer, A Wenzel 2011 IEEE 17th International On-Line Testing Symposium, 73-78, 2011 | 3 | 2011 |
Alix Munier Kordonprofesseur d'informatique, LIP6, Sorbonne UniversitéPreverjeni e-poštni naslov na lip6.fr