Spremljaj
Ashis Kumar Mal
Ashis Kumar Mal
Professor of ECE, NIT Durgapur
Preverjeni e-poštni naslov na ece.nitdgp.ac.in - Domača stran
Naslov
Navedeno
Navedeno
Leto
Direct correlation between mechanical failure and metallurgical reaction in flip chip solder joints
CY Liu, C Chen, AK Mal, KN Tu
Journal of Applied Physics 85 (7), 3882-3886, 1999
991999
On-chip antennas using standard CMOS technology: A brief overview
S Mandal, SK Mandal, AK Mal
2017 International Conference on Innovations in Electronics, Signal …, 2017
182017
A miniaturized CPW-fed on-chip UWB monopole antenna with band-notch characteristics
S Mandal, A Karmakar, H Singh, SK Mandal, R Mahapatra, AK Mal
International Journal of Microwave and Wireless Technologies 12 (1), 95-102, 2020
172020
Uncoercibility in e-voting and eauctioning mechanisms using deniable encryption
J Howlader, V Nair, S Basu, AK Mal
International Journal of Network Security and Its Applications 3 (2), 97-109, 2011
172011
A high speed counter for analog-to-digital converters
PR Thota, AK Mal
2016 International Conference on Microelectronics, Computing and …, 2016
162016
A low voltage high output impedance bulk driven regulated cascode current mirror
N Lakkamraju, AK Mal
2011 3rd International Conference on Electronics Computer Technology 3, 79-83, 2011
162011
Non Overlapping Clock (NOC) generator for low frequency switched capacitor circuits
AK Mal, R Todani
IEEE Technology Students' Symposium, 226-231, 2011
162011
Performance enhancement of a VCO using symbolic modelling and optimisation
M Panda, SK Patnaik, AK Mal
IET Circuits, Devices & Systems 12 (2), 196-202, 2018
152018
Design of tunable folded cascode differential amplifier using PDM
AK Mal, R Todani, OP Hari
2011 IEEE Symposium on Computers & Informatics, 296-301, 2011
152011
Optimal design of complementary metal-oxide-semiconductor analogue circuits: An evolutionary approach
S Ghosh, BP De, R Kar, D Mandal, AK Mal
Computers & Electrical Engineering 80, 106485, 2019
142019
CMOS time-mode smart temperature sensor using programmable temperature compensation devices and time-to-digital converter
R Krishna, AK Mal, R Mahapatra
Analog Integrated Circuits and Signal Processing 102 (1), 97-109, 2020
132020
Symbiotic organisms search algorithm for optimal design of CMOS two‐stage op‐amp with nulling resistor and robust bias circuit
S Ghosh, B Prasad De, R Kar, AK Mal
IET Circuits, Devices & Systems 13 (5), 679-688, 2019
132019
Time-domain smart temperature sensor using current starved inverters and switched ring oscillator-based time-to-digital converter
R Krishna, AK Mal, R Mahapatra
Circuits, Systems, and Signal Processing 39 (4), 1751-1769, 2020
122020
Design of low noise amplifier for sensor applications
D Jana, AK Mal
2017 Devices for Integrated Circuit (DevIC), 451-455, 2017
122017
An explicit approach for bandwidth evaluation of on-chip VLSI RC interconnects with current mode signaling technique
R Kar, KR Reddy, AK Mal, AK Bhattacharjee
2010 Second International conference on Computing, Communication and …, 2010
12*2010
Sampled analog architecture for DCT and DST
AK Mal, A Basu, AS Dhar
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No …, 2004
122004
Performance of novel adaptive schemes for cognitive full-duplex relaying-based downlink cooperative NOMA
A Mukherjee, P Chakraborty, S Prakriya, AK Mal
IEEE Transactions on Wireless Communications 22 (5), 3161-3179, 2022
112022
Optimal design of a 5.5-GHz low-power high-gain CMOS LNA using the flower pollination algorithm
S Ghosh, BP De, R Kar, D Mandal, AK Mal
Journal of Computational Electronics 18, 737-747, 2019
112019
Sealed‐bid auction: a cryptographic solution to bid‐rigging attack in the collusive environment
J Howlader, AK Mal
Security and Communication Networks 8 (18), 3415-3440, 2015
112015
Digital controlled analog architecture for DCT and DST using capacitor switching
A Basu, AK Mal, AS Dhar
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No …, 2004
112004
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