| An analytical framework for estimating tco and exploring data center design space D Hardy, M Kleanthous, I Sideris, AG Saidi, E Ozer, Y Sazeides 2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013 | 45 | 2013 |
| The performance vulnerability of architectural and non-architectural arrays to permanent faults D Hardy, I Sideris, N Ladas, Y Sazeides 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 48-59, 2012 | 29 | 2012 |
| EuroCloud: energy-conscious 3D server-on-chip for green cloud services E Ozer, K Flautner, S Idgunji, A Saidi, Y Sazeides, B Ahsan, N Ladas, ... 2nd Workshop on Architectural Concerns in Large Datacenters, 2010 | 15 | 2010 |
| A bisr architecture for embedded memories K Pekmestzi, N Axelos, I Sideris, N Moshopoulos 2008 14th IEEE International On-Line Testing Symposium, 149-154, 2008 | 15 | 2008 |
| A cache based stack folding technique for high performance Java processors I Sideris, G Economakos, K Pekmestzi Proceedings of the 4th international workshop on Java technologies for real …, 2006 | 12 | 2006 |
| Power saving by reusing results of identical micro-operations I Sideris, D Croxford, A Burdass US Patent 9,817,466, 2017 | 11 | 2017 |
| EETCO: A tool to estimate and explore the implications of datacenter design choices on the tco and the environmental impact D Hardy, I Sideris, A Saidi, Y Sazeides Workshop on Energy-efficient Computing for a Sustainable World, 2011 | 11 | 2011 |
| Preventing duplicate execution by sharing a result between different processing lanes assigned micro-operations that generate the same result I Sideris, D Croxford, A Burdass US Patent 10,514,928, 2019 | 8 | 2019 |
| Cost effective protection techniques for TCAM memory arrays I Sideris, K Pekmestzi IEEE Transactions on Computers 61 (12), 1778-1788, 2011 | 8 | 2011 |
| Reuse of results of back-to-back micro-operations I Sideris, D Croxford, A Burdass US Patent 9,933,841, 2018 | 7 | 2018 |
| Eliminating energy of same-content-cell-columns of on-chip SRAM arrays B Ahsan, L Ndreu, I Sideris, Y Sazeides, S Idgunji, E Ozer IEEE/ACM International Symposium on Low Power Electronics and Design, 181-186, 2011 | 7 | 2011 |
| A fast multiplier-less edge detection accelerator for FPGAs N Anastasiadis, I Sideris, K Pekmestzi Proceedings of the 2010 ACM Symposium on Applied Computing, 510-515, 2010 | 7 | 2010 |
| Power-efficient and low latency implementation of programmable FIR filters using carry-save arithmetic D Bekiaris, I Sideris, G Economakos, KZ Pekmestzi 2007 14th IEEE International Conference on Electronics, Circuits and Systems …, 2007 | 6 | 2007 |
| A column parity based fault detection mechanism for FIFO buffers I Sideris, K Pekmestzi Integration 46 (3), 265-279, 2013 | 5 | 2013 |
| Novel systolic schemes for serial-parallel multiplication I Sideris, K Anagnostopoulos, P Kalivas, K Pekmestzi 2005 13th European Signal Processing Conference, 1-4, 2005 | 4 | 2005 |
| Graphics processing I Sideris, P Sonkoly, AP Castro US Patent 11,900,522, 2024 | 3 | 2024 |
| Discarding of threads processed by a warp processing unit S Forey, I Sideris, RG Döffinger US Patent 10,748,236, 2020 | 3 | 2020 |
| A flexible architecture for DSP applications combining high performance arithmetic with small scale configurability S Xydis, I Sideris, G Economakos, K Pekmestzi 2008 16th European Signal Processing Conference, 1-5, 2008 | 3 | 2008 |
| A predecoding technique for ILP exploitation in Java processors I Sideris, K Pekmestzi, G Economakos Journal of Systems Architecture 54 (7), 707-728, 2008 | 3 | 2008 |
| Apparatus and method of executing thread groups I Sideris, E Cordero-crespo, A Kleen US Patent 10,761,885, 2020 | 2 | 2020 |