Прати
Karthik Swaminathan
Karthik Swaminathan
IBM Watson Research
Верификована је имејл адреса на us.ibm.com - Почетна страница
Наслов
Навело
Навело
Година
Architecture exploration for ambient energy harvesting nonvolatile processors
K Ma, Y Zheng, S Li, K Swaminathan, X Li, Y Liu, J Sampson, Y Xie, ...
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
3012015
GaaS-X: Graph analytics accelerator supporting sparse data representation using crossbar architectures
N Challapalle, S Rampalli, L Song, N Chandramoorthy, K Swaminathan, ...
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020
752020
Steep-slope devices: From dark to dim silicon
K Swaminathan, E Kultursay, V Saripalli, V Narayanan, MT Kandemir, ...
IEEE Micro 33 (5), 50-59, 2013
642013
Resilient low voltage accelerators for high energy efficiency
N Chandramoorthy, K Swaminathan, M Cochet, A Paidimarri, S Eldridge, ...
2019 IEEE International Symposium on High Performance Computer Architecture …, 2019
622019
Nonvolatile processor architectures: Efficient, reliable progress with unstable power
K Ma, X Li, K Swaminathan, Y Zheng, S Li, Y Liu, Y Xie, JJ Sampson, ...
IEEE Micro 36 (3), 72-83, 2016
522016
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores
K Swaminathan, E Kultursay, V Saripalli, V Narayanan, M Kandemir, ...
IEEE/ACM International Symposium on Low Power Electronics and Design, 247-252, 2011
432011
Bravo: Balanced reliability-aware voltage optimization
K Swaminathan, N Chandramoorthy, CY Cher, R Bertran, ...
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
362017
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores
E Kultursay, K Swaminathan, V Saripalli, V Narayanan, MT Kandemir, ...
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2012
342012
Resilient, UAV-embedded real-time computing
A Vega, CC Lin, K Swaminathan, A Buyuktosunoglu, S Pankanti, P Bose
2015 33rd IEEE international conference on computer design (ICCD), 736-739, 2015
332015
Crossbar based processing in memory accelerator architecture for graph convolutional networks
N Challapalle, K Swaminathan, N Chandramoorthy, V Narayanan
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021
272021
Steep slope devices: Enabling new architectural paradigms
K Swaminathan, H Liu, X Li, MS Kim, J Sampson, V Narayanan
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
262014
A 12nm agile-designed SoC for swarm-based perception with heterogeneous IP blocks, a reconfigurable memory hierarchy, and an 800MHz multi-plane NoC
T Jia, P Mantovani, MC Dos Santos, D Giri, J Zuckerman, EJ Loscalzo, ...
ESSCIRC 2022-IEEE 48th European Solid State Circuits Conference (ESSCIRC …, 2022
252022
Dynamic power and energy management for energy harvesting nonvolatile processor systems
K Ma, X Li, H Liu, X Sheng, Y Wang, K Swaminathan, Y Liu, Y Xie, ...
ACM Transactions on Embedded Computing Systems (TECS) 16 (4), 1-23, 2017
242017
Modeling steep slope devices: From circuits to architectures
K Swaminathan, MS Kim, N Chandramoorthy, B Sedighi, R Perricone, ...
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
232014
System and method for multithreaded text indexing for next generation multi-core architectures
A Narang, KV Swaminathan, P Agrawal, D Joseph
US Patent 8,661,037, 2014
232014
Analyzing and improving resilience and robustness of autonomous systems
Z Wan, K Swaminathan, PY Chen, N Chandramoorthy, A Raychowdhury
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022
212022
When to forget: a system-level perspective on STT-RAMs
K Swaminathan, R Pisolkar, C Xu, V Narayanan
17th Asia and South Pacific Design Automation Conference, 311-316, 2012
202012
An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs
K Swaminathan, H Liu, J Sampson, V Narayanan
ACM SIGARCH Computer Architecture News 42 (3), 241-252, 2014
192014
Hierarchical in-memory sort engine
A Buyuktosunoglu, S Chellappa, T Kirihata, KV Swaminathan
US Patent 9,268,863, 2016
172016
Enabling power-efficient designs with III-V tunnel FETs
MS Kim, H Liu, K Swaminathan, X Li, S Datta, V Narayanan
2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 1-4, 2014
162014
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