ติดตาม
Wei Hu
Northwestern Polytechnical University, University of California, San Diego
ยืนยันอีเมลแล้วที่ nwpu.edu.cn
ชื่อ
อ้างโดย
อ้างโดย
ปี
An overview of hardware security and trust: Threats, countermeasures, and design tools
W Hu, CH Chang, A Sengupta, S Bhunia, R Kastner, H Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
1872020
Register transfer level information flow tracking for provably secure hardware design
A Ardeshiricham, W Hu, J Marxen, R Kastner
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
1742017
Detecting hardware trojans with gate-level information-flow tracking
W Hu, B Mao, J Oberg, R Kastner
Computer 49 (8), 44-52, 2016
1132016
Hardware information flow tracking
W Hu, A Ardeshiricham, R Kastner
ACM Computing Surveys (CSUR) 54 (4), 1-39, 2021
902021
Information flow isolation in I2C and USB
J Oberg, W Hu, A Irturk, M Tiwari, T Sherwood, R Kastner
Proceedings of the 48th Design Automation Conference, 254-259, 2011
822011
Theoretical fundamentals of gate level information flow tracking
W Hu, J Oberg, A Irturk, M Tiwari, T Sherwood, D Mu, R Kastner
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
792011
Property specific information flow analysis for hardware security verification
W Hu, A Ardeshiricham, MS Gobulukoglu, X Wang, R Kastner
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
562018
On the complexity of generating gate level information flow tracking logic
W Hu, J Oberg, A Irturk, M Tiwari, T Sherwood, D Mu, R Kastner
IEEE Transactions on Information Forensics and Security 7 (3), 1067-1080, 2012
552012
Gate-level information flow tracking for security lattices
W Hu, D Mu, J Oberg, B Mao, M Tiwari, T Sherwood, R Kastner
ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (1 …, 2014
482014
Theoretical analysis of gate level information flow tracking
J Oberg, W Hu, A Irturk, M Tiwari, T Sherwood, R Kastner
Proceedings of the 47th Design Automation Conference, 244-247, 2010
482010
Clepsydra: Modeling timing flows in hardware designs
A Ardeshiricham, W Hu, R Kastner
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 147-154, 2017
422017
Towards property driven hardware security
W Hu, A Althoff, A Ardeshiricham, R Kastner
2016 17th International Workshop on Microprocessor and SOC Test and …, 2016
392016
Energy-efficient border intrusion detection using wireless sensors network
T Yang, D Mu, W Hu, HX Zhang
EURASIP Journal on Wireless Communications and Networking 2014, 1-12, 2014
382014
Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans
W Hu, L Zhang, A Ardeshiricham, J Blackstone, B Hou, Y Tai, R Kastner
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 707-713, 2017
342017
Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design
B Mao, W Hu, A Althoff, J Matai, Y Tai, D Mu, T Sherwood, R Kastner
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 2018
262018
Imprecise security: quality and complexity tradeoffs for hardware information flow tracking
W Hu, A Becker, A Ardeshiricham, Y Tai, P Ienne, D Mu, R Kastner
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
232016
A bottom‐up approach to verifiable embedded system information flow security
D Mu, W Hu, B Mao, B Ma
IET information security 8 (1), 12-17, 2014
232014
Expanding gate level information flow tracking for multilevel security
W Hu, J Oberg, J Barrientos, D Mu, R Kastner
IEEE Embedded Systems Letters 5 (2), 25-28, 2013
232013
Quantifying timing-based information flow in cryptographic hardware
B Mao, W Hu, A Althoff, J Matai, J Oberg, D Mu, T Sherwood, R Kastner
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 552-559, 2015
202015
X-attack: remote activation of satisfiability don't-care hardware Trojans on shared FPGAs
DG Mahmoud, W Hu, M Stojilovic
2020 30th International Conference on Field-Programmable Logic and …, 2020
192020
ระบบไม่สามารถดำเนินการได้ในขณะนี้ โปรดลองใหม่อีกครั้งในภายหลัง
บทความ 1–20