| A highly reliable and energy-efficient triple-node-upset-tolerant latch design CI Kumar, B Anand IEEE transactions on nuclear science 66 (10), 2196-2206, 2019 | 55 | 2019 |
| Two dimensional analytical modeling for asymmetric 3T and 4T double gate tunnel FET in sub-threshold region: Potential and electric field M Yadav, A Bulusu, S Dasgupta Microelectronics Journal 44 (12), 1251-1259, 2013 | 55 | 2013 |
| Vertical silicon nanowire gate-all-around field effect transistor based nanoscale CMOS S Maheshwaram, SK Manhas, G Kaushal, B Anand, N Singh IEEE electron device letters 32 (8), 1011-1013, 2011 | 48 | 2011 |
| Impact of random spatial fluctuation in non-uniform crystalline phases on the device variation of ferroelectric FET C Garg, N Chauhan, S Deng, AI Khan, S Dasgupta, A Bulusu, K Ni IEEE Electron Device Letters 42 (8), 1160-1163, 2021 | 43 | 2021 |
| Spacer engineering-based high-performance reconfigurable FET with low off current characteristics A Bhattacharjee, M Saikiran, A Dutta, B Anand, S Dasgupta IEEE Electron Device Letters 36 (5), 520-522, 2015 | 42 | 2015 |
| Drain current saturation in line tunneling-based TFETs: An analog design perspective A Acharya, AB Solanki, S Dasgupta, B Anand IEEE Transactions on Electron Devices 65 (1), 322-330, 2017 | 35 | 2017 |
| Impact of gate–source overlap on the device/circuit analog performance of line TFETs A Acharya, AB Solanki, S Glass, QT Zhao, B Anand IEEE Transactions on Electron Devices 66 (9), 4081-4086, 2019 | 34 | 2019 |
| Vertical nanowire CMOS parasitic modeling and its performance analysis S Maheshwaram, SK Manhas, G Kaushal, B Anand, N Singh IEEE transactions on electron devices 60 (9), 2943-2950, 2013 | 34 | 2013 |
| Effect of load capacitance and input transition time on FinFET inverter capacitances A Pandey, S Raycha, S Maheshwaram, SK Manhas, S Dasgupta, ... IEEE Transactions on Electron Devices 61 (1), 30-36, 2013 | 33 | 2013 |
| A highly reliable and energy efficient radiation hardened 12T SRAM cell design CI Kumar, B Anand IEEE Transactions on Device and Materials Reliability 20 (1), 58-66, 2019 | 29 | 2019 |
| Compact NBTI reliability modeling in Si nanowire MOSFETs and effect in circuits O Prakash, S Beniwal, S Maheshwaram, A Bulusu, N Singh, SK Manhas IEEE Transactions on Device and Materials Reliability 17 (2), 404-413, 2017 | 21 | 2017 |
| Device circuit co-design issues in vertical nanowire CMOS platform S Maheshwaram, SK Manhas, G Kaushal, B Anand, N Singh IEEE electron device letters 33 (7), 934-936, 2012 | 20 | 2012 |
| Efficient nanoscale VLSI standard cell library characterization using a novel delay model S Miryala, B Kaur, B Anand, S Manhas 2011 12th International Symposium on Quality Electronic Design, 1-6, 2011 | 20 | 2011 |
| A new aspect of saturation phenomenon in FinFETs and its implication on analog circuits S Banchhor, KD Kumar, A Dwivedi, B Anand IEEE Transactions on Electron Devices 66 (7), 2863-2868, 2019 | 17 | 2019 |
| A Novel Extraction Method for Tunnel FETs and Its Implication on Analog Design A Acharya, S Dasgupta, B Anand IEEE Transactions on Electron Devices 64 (2), 629-633, 2016 | 17 | 2016 |
| Multifinger MOSFETs’ optimization considering stress and INWE in static CMOS circuits A Sharma, N Alam, S Dasgupta, A Bulusu IEEE Transactions on Electron Devices 63 (6), 2517-2523, 2016 | 17 | 2016 |
| Negative-to-positive differential resistance transition in ferroelectric FET: physical insight and utilization in analog circuits N Chauhan, N Bagga, S Banchhor, A Datta, S Dasgupta, A Bulusu IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control 69 …, 2021 | 16 | 2021 |
| Multidomain negative capacitance effect in P (VDF-TrFE) ferroelectric capacitor and passive voltage amplification KJ Singh, A Bulusu, S Dasgupta IEEE Transactions on Electron Devices 67 (11), 4696-4700, 2020 | 16 | 2020 |
| Design of highly reliable energy‐efficient SEU tolerant 10T SRAM cell CI Kumar, B Anand Electronics Letters 54 (25), 1423-1424, 2018 | 16 | 2018 |
| Nitrogen-terminated semiconducting zigzag GNR FET with negative differential resistance A Kumar, V Kumar, S Agarwal, A Basak, N Jain, A Bulusu, SK Manhas IEEE Transactions on Nanotechnology 13 (1), 16-22, 2013 | 16 | 2013 |
Sudeb DasguptaDepartment of Electronics and Communication Engineering, IIT Roorkeeยืนยันอีเมลแล้วที่ iitr.ac.in