17.6 A 21.7-to-26.5 GHz charge-sharing locking quadrature PLL with implicit digital frequency-tracking loop achieving 75fs jitter and− 250dB FoM Y Hu, X Chen, T Siriburanon, J Du, Z Gao, V Govindaraj, A Zhu, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 276-278, 2020 | 51 | 2020 |
A charge-sharing locking technique with a general phase noise theory of injection locking Y Hu, X Chen, T Siriburanon, J Du, V Govindaraj, A Zhu, RB Staszewski IEEE Journal of Solid-State Circuits 57 (2), 518-534, 2021 | 29 | 2021 |
A Tiny Complementary Oscillator With 1/f3 Noise Reduction Using a Triple-8-Shaped Transformer X Chen, Y Hu, T Siriburanon, J Du, RB Staszewski, A Zhu IEEE Solid-State Circuits Letters 3, 162-165, 2020 | 19 | 2020 |
Oscillator-network-based ising machine Y Zhang, Y Deng, Y Lin, Y Jiang, Y Dong, X Chen, G Wang, D Shang, ... micromachines 13 (7), 1016, 2022 | 17 | 2022 |
A Millimeter-Wave ADPLL With Reference Oversampling and Third-Harmonic Extraction Featuring High FoMjitter-N J Du, T Siriburanon, X Chen, Y Hu, V Govindaraj, A Zhu, RB Staszewski IEEE Solid-State Circuits Letters 4, 214-217, 2021 | 16 | 2021 |
A Gm-Boosting Technique for Millimeter-Wave Low-Noise Amplifiers in 28-nm Triple-Well Bulk CMOS Using Floating Resistor in Body Biasing E Kobal, T Siriburanon, X Chen, HM Nguyen, RB Staszewski, A Zhu IEEE Transactions on Circuits and Systems I: Regular Papers 69 (12), 5007-5017, 2022 | 15 | 2022 |
A 24–31 GHz Reference Oversampling ADPLL Achieving FoMjitter−N of -269.3 dB J Du, T Siriburanon, X Chen, Y Hu, V Govindaraj, A Zhu, RB Staszewski 2021 Symposium on VLSI Circuits, 1-2, 2021 | 14 | 2021 |
A 30-GHz class-F quadrature DCO using phase shifts between drain–gate–source for low flicker phase noise and I/Q exactness X Chen, Y Hu, T Siriburanon, J Du, RB Staszewski, A Zhu Ieee Journal of Solid-State Circuits 58 (7), 1945-1958, 2023 | 10 | 2023 |
Flicker phase-noise reduction using gate–drain phase shift in transformer-based oscillators X Chen, Y Hu, T Siriburanon, J Du, RB Staszewski, A Zhu IEEE Transactions on Circuits and Systems I: Regular Papers 69 (3), 973-984, 2021 | 10 | 2021 |
A soft-error-tolerant, 1.25 GHz to 3.125 GHz, 3.18 ps RMS-jitter CPPLL in 40 nm CMOS process Q Guo, Y Guo, B Liang, JJ Chen, X Chen Microelectronics Reliability 124, 114337, 2021 | 6 | 2021 |
A digital-to-time converter based on crystal oscillator waveform achieving 86-fs jitter in 22-nm FD-SOI CMOS X Chen, T Siriburanon, Z Wang, J Du, Y Hu, A Zhu, RB Staszewski 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 319-322, 2022 | 5 | 2022 |
A single-event transient radiation hardened low-dropout regulator for LC voltage-controlled oscillator X Chen, Q Guo, H Yuan, Y Guo Symmetry 14 (4), 788, 2022 | 5 | 2022 |
A differential class‐E power amplifier with dynamic body bias technique JC Du, ZG Wang, J Xu, X Chen, TZ Qin Microwave and Optical Technology Letters 62 (1), 130-136, 2020 | 4 | 2020 |
Design of a Ring Oscillator with Temperature and Process Compensation Adopting a Novel Method JC Du, ZG Wang, X Chen, J Xu, BB Ma 2018 Progress in Electromagnetics Research Symposium (PIERS-Toyama), 1560-1564, 2018 | 2 | 2018 |
315-MHz self-acceleration start-up OOK super-regenerative wireless receiver J Xu, Y Chen, X Chen, ZG Wang, JC Du, Y Shi IEEE Microwave and Wireless Components Letters 28 (4), 350-352, 2018 | 1 | 2018 |
A Low-Noise Digital-to-Time Converter Exploiting Waveform of Integrated Crystal Oscillator T Siriburanon, X Chen, C Liu, J Du, A Zhu, RB Staszewski IEEE Journal of Solid-State Circuits, 2024 | | 2024 |
A Tiny 3.15–43.4-GHz 3.6-mW Divide-by-8 Ring-Based Injection-Locked Frequency Divider Using Multiphase Waveform Gating Technique F Hong, X Chen, A Zhu, RB Staszewski, T Siriburanon 2024 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2024 | | 2024 |
A Low Phase Noise Crystal Oscillator with a Fast Start-Up Bandgap Reference for WLAN Applications P Wu, P Li, X Chen, P Cheng, J Zhu Applied Sciences 13 (9), 5652, 2023 | | 2023 |
Digitally Intensive RF/Millimetre-Wave Frequency Generation Techniques X Chen University College Dublin. School of Electrical and Electronic Engineering, 2022 | | 2022 |
Design of 5 GHz low noise amplifier with IBM SiGe 0.13μm BiCMOS process X Jian, X Chen, L Ma, Y Zhou, W Zhigong 高技术通讯 (英文版), 227-231, 2018 | | 2018 |