| Syn-STELLAR: An EM/Power SCA-Resilient AES-256 With Synthesis-Friendly Signature Attenuation A Ghosh, D Das, J Danial, V De, S Ghosh, S Sen IEEE Journal of Solid-State Circuits 57 (1), 167-181, 2021 | 29 | 2021 |
| 36.2 An EM/Power SCA-Resilient AES-256 with Synthesizable Signature Attenuation Using Digital-Friendly Current Source and RO-Bleed-Based Integrated Local Feedback and Global … A Ghosh, D Das, J Danial, V De, S Ghosh, S Sen 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 499-501, 2021 | 28 | 2021 |
| A 334uW 0.158 mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator A Ghosh, JMB Mera, A Karmakar, D Das, S Ghosh, I Verbauwhede, S Sen 2022 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2022 | 17 | 2022 |
| Electromagnetic analysis of integrated on-chip sensing loop for side-channel and fault-injection attack detection A Ghosh, M Nath, D Das, S Ghosh, S Sen IEEE Microwave and Wireless Components Letters 32 (6), 784-787, 2022 | 15 | 2022 |
| FPGA implementation of arcsine function using CORDIC algorithm A Saha, A Ghosh, KG Kumar AMSE JOURNALS-AMSE IIETA publication-2017-Series: Advances A 54 (2), 197-202, 2017 | 10 | 2017 |
| A 334 μW 0.158 mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom–Cook Multiplication A Ghosh, JMB Mera, A Karmakar, D Das, S Ghosh, I Verbauwhede, S Sen IEEE Journal of Solid-State Circuits 58 (8), 2383-2398, 2023 | 9 | 2023 |
| A Digital Cascoded Signature Attenuation Countermeasure with Intelligent Malicious Voltage Drop Attack Detector for EM/Power SCA Resilient Parallel AES-256 A Ghosh, DH Seo, D Das, S Ghosh, S Sen 2022 IEEE Custom Integrated Circuits Conference (CICC), 01-02, 2022 | 9 | 2022 |
| Modeling the neuron as a nanocommunication system to identify spatiotemporal molecular events in neurodegenerative disease A Banerjee, JL Paluh, A Mukherjee, KG Kumar, A Ghosh, MK Naskar International journal of nanomedicine 13, 3105, 2018 | 8 | 2018 |
| Physical time-varying transfer function as generic low-overhead power-SCA countermeasure A Ghosh, D Das, S Sen IEEE Open Journal of Circuits and Systems 4, 228-240, 2023 | 6 | 2023 |
| Multiplier-less hardware realization of trigonometric functions for high speed applications D De, A Ghosh, KG Kumar, A Saha, MK Naskar 2018 IEEE Applied Signal Processing Conference (ASPCON), 149-152, 2018 | 6 | 2018 |
| Ramanujan sums and signal processing: An overview D De, K Gaurav Kumar, A Ghosh, MK Naskar Proceeding of the Second International Conference on Microelectronics …, 2019 | 5 | 2019 |
| Area Efficient Architecture of Hyperbolic functions for high frequency applications A Saha, KG Kumar, A Ghosh, MK Naskar 2017 International Conference on Circuits, Controls, and Communications …, 2017 | 4 | 2017 |
| Rudraksh: A compact and lightweight post-quantum key-encapsulation mechanism S Kundu, A Ghosh, A Karmakar, S Sen, I Verbauwhede arXiv preprint arXiv:2501.13799, 2025 | 3 | 2025 |
| Power and EM SCA Resilience in 65nm AES-256 Exploiting Clock-Slew Dependent Variability in CMOS Digital Circuits A Ghosh, MA Rahman, D Das, S Ghosh, S Sen 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023 | 3 | 2023 |
| EM SCA & FI Self-Awareness and Resilience with Single On-chip Loop & ML Classifiers A Ghosh, D Das, S Ghosh, S Sen 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 592-595, 2022 | 3 | 2022 |
| Improving network throughput by hardware realization of a dynamic content caching scheme for information-centric networking (ICN) A Ghosh, B Chakraborty, A Raha, A Mukherjee Wireless Personal Communications 116, 2873-2898, 2021 | 3 | 2021 |
| Energy-Efficient Edge Detection using Approximate Ramanujan Sums A Ghosh, KG Kumar, D De, A Raha, MK Naskar 2020 21st International Symposium on Quality Electronic Design (ISQED), 414-420, 2020 | 3 | 2020 |
| Approximate DCT and Quantization Techniques for Energy-Constrained Image Sensors MC Li, A Ghosh, S Sen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 2 | 2024 |
| Circuit-Level Techniques for Side-Channel Attack Resilience: A tutorial S Sen, A Ghosh IEEE Solid-State Circuits Magazine 16 (4), 96-108, 2024 | 1 | 2024 |
| R-STELLAR: A Resilient Synthesizable Signature Attenuation SCA Protection on AES-256 with built-in Attack-on-Countermeasure Detection A Ghosh, DH Seo, D Das, S Ghosh, S Sen arXiv preprint arXiv:2408.12021, 2024 | 1 | 2024 |
Shreyas SenElmore Associate Professor of ECE & BME, Purdue University; Director, Center for Internet of Bodiesยืนยันอีเมลแล้วที่ gatech.edu