| Hardware thread scheduling JA Joao, AR Carro, Z Huang US Patent 10,261,835, 2019 | 29 | 2019 |
| DynaSprint: Microarchitectural sprints with dynamic utility and thermal management Z Huang, JA Joao, A Rico, AD Hilton, BC Lee Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 11 | 2019 |
| Exploring the Impact of Switch Arity on Butterfly Fat Tree FPGA NoCs I Lang, Z Huang, N Kapre The 28th IEEE International Symposium On Field-Programmable Custom Computing …, 2020 | 4 | 2020 |
| Decoupling loads for nano-instruction set computers Z Huang, AD Hilton, BC Lee ACM SIGARCH Computer Architecture News 44 (3), 406-417, 2016 | 3 | 2016 |
| Defer buffer JA Joao, Z Huang, AR Carro US Patent 10,275,250, 2019 | | 2019 |
| Coordinating Software and Hardware for Performance Under Power Constraints ZP Huang Duke University, 2019 | | 2019 |
