| Optimal design of a new cascaded multilevel inverter topology with reduced switch count MD Siddique, S Mekhilef, NM Shah, MA Memon Ieee Access 7, 24498-24510, 2019 | 283 | 2019 |
| A new multilevel inverter topology with reduce switch count MD Siddique, S Mekhilef, NM Shah, A Sarwar, A Iqbal, MA Memon IEEE Access 7, 58584-58594, 2019 | 226 | 2019 |
| A new switched capacitor 7L inverter with triple voltage gain and low voltage stress MD Siddique, S Mekhilef, NM Shah, JSM Ali, F Blaabjerg IEEE Transactions on Circuits and Systems II: Express Briefs 67 (7), 1294-1298, 2019 | 182 | 2019 |
| Low switching frequency based asymmetrical multilevel inverter topology with reduced switch count MD Siddique, S Mekhilef, NM Shah, A Sarwar, A Iqbal, M Tayyab, ... IEEe Access 7, 86374-86383, 2019 | 163 | 2019 |
| Single-phase step-up switched-capacitor-based multilevel inverter topology with SHEPWM MD Siddique, S Mekhilef, S Padmanaban, MA Memon, C Kumar IEEE Transactions on Industry Applications 57 (3), 3107-3119, 2020 | 155 | 2020 |
| Asynchronous particle swarm optimization-genetic algorithm (APSO-GA) based selective harmonic elimination in a cascaded H-bridge multilevel inverter MA Memon, MD Siddique, S Mekhilef, M Mubin IEEE Transactions on Industrial Electronics 69 (2), 1477-1487, 2021 | 151 | 2021 |
| A new single phase single switched-capacitor based nine-level boost inverter topology with reduced switch count and voltage stress MD Siddique, S Mekhilef, NM Shah, JSM Ali, M Meraj, A Iqbal, ... IEEE Access 7, 174178-174188, 2019 | 127 | 2019 |
| A single DC source nine-level switched-capacitor boost inverter topology with reduced switch count MD Siddique, S Mekhilef, NM Shah, N Sandeep, JSM Ali, A Iqbal, ... IEEE Access 8, 5840-5851, 2019 | 92 | 2019 |
| Reduced switch count based single source 7L boost inverter topology MD Siddique, JSM Ali, S Mekhilef, A Mustafa, N Sandeep, D Almakhles IEEE Transactions on Circuits and Systems II: Express Briefs 67 (12), 3252-3256, 2020 | 81 | 2020 |
| A new configurable topology for multilevel inverter with reduced switching components MD Siddique, A Iqbal, MA Memon, S Mekhilef IEEE Access 8, 188726-188741, 2020 | 80 | 2020 |
| Dual asymmetrical dc voltage source based switched capacitor boost multilevel inverter topology MD Siddique, S Mekhilef, A Sarwar, A Alam, NM Shah IET Power Electronics 13 (7), 1481-1486, 2020 | 74 | 2020 |
| Extended multilevel inverter topology with reduced switch count and voltage stress MD Siddique, S Mekhilef, M Rawa, A Wahyudie, B Chokaev, I Salamov IEEE Access 8, 201835-201846, 2020 | 70 | 2020 |
| A new family of step-up hybrid switched-capacitor integrated multilevel inverter topologies with dual input voltage sources A Iqbal, MD Siddique, BP Reddy, PK Maroti, R Alammari IEEE Access 9, 4398-4410, 2020 | 68 | 2020 |
| A new single‐phase cascaded multilevel inverter topology with reduced number of switches and voltage stress MD Siddique, S Mekhilef, NM Shah, A Sarwar, MA Memon International Transactions on Electrical Energy Systems 30 (2), e12191, 2020 | 67 | 2020 |
| Dual input switched‐capacitor‐based single‐phase hybrid boost multilevel inverter topology with reduced number of components M Rawa, MD Siddique, S Mekhilef, N Mohamed Shah, H Bassi, ... IET Power Electronics 13 (4), 881-891, 2020 | 66 | 2020 |
| Recent trends and review on switched‐capacitor‐based single‐stage boost multilevel inverter M Kumari, MD Siddique, A Sarwar, M Tariq, S Mekhilef, A Iqbal International Transactions on Electrical Energy Systems 31 (3), e12730, 2021 | 64 | 2021 |
| Quadruple boost multilevel inverter (QB-MLI) topology with reduced switch count A Iqbal, MD Siddique, BP Reddy, PK Maroti IEEE Transactions on Power Electronics 36 (7), 7372-7377, 2020 | 61 | 2020 |
| Single-phase boost switched-capacitor-based multilevel inverter topology with reduced switching devices MD Siddique, MF Karim, S Mekhilef, M Rawa, M Seyedmahmoudian, ... IEEE Journal of Emerging and Selected Topics in Power Electronics 10 (4 …, 2021 | 58 | 2021 |
| A transformerless high gain dc–dc boost converter with reduced voltage stress M Zaid, S Khan, MD Siddique, A Sarwar, J Ahmad, Z Sarwer, A Iqbal International Transactions on Electrical Energy Systems 31 (5), e12877, 2021 | 57 | 2021 |
| An improved asymmetrical multilevel inverter topology with reduced semiconductor device count Z Sarwer, MD Siddique, A Iqbal, A Sarwar, S Mekhilef International Transactions on Electrical Energy Systems 30 (11), e12587, 2020 | 52 | 2020 |
Prof. Dr. Saad Mekhilef, IEEE FellowDistinguished Professor, Swinburne University of Technologyยืนยันอีเมลแล้วที่ swin.edu.au