| Performance analysis on complementary FET (CFET) relative to standard CMOS with nanosheet FET SG Jung, D Jang, SJ Min, E Park, HY Yu IEEE Journal of the Electron Devices Society 10, 78-82, 2021 | 34 | 2021 |
| Analytical model of contact resistance in vertically stacked nanosheet FETs for sub-3-nm technology node SG Jung, JK Kim, HY Yu IEEE Transactions on Electron Devices 69 (3), 930-935, 2022 | 13 | 2022 |
| Enhancement of DRAM performance by adopting metal–interlayer–semiconductor source/drain contact structure on DRAM cell M Son, SG Jung, SH Kim, E Park, SH Lee, HY Yu IEEE Transactions on Electron Devices 68 (5), 2275-2280, 2021 | 13 | 2021 |
| Electrothermal characterization and optimization of monolithic 3D complementary FET (CFET) D Jang, SG Jung, SJ Min, HY Yu IEEE access 9, 158116-158121, 2021 | 11 | 2021 |
| Device design guidelines of 3-nm node complementary FET (CFET) in perspective of electrothermal characteristics SG Jung, D Jang, SJ Min, E Park, HY Yu IEEE Access 10, 41112-41118, 2022 | 9 | 2022 |
| Analysis of drain linear current turn-around effect in off-state stress mode in pMOSFET SG Jung, SH Lee, CK Kim, MS Yoo, HY Yu IEEE Electron Device Letters 41 (6), 804-807, 2020 | 8 | 2020 |
| Impact of random dopant fluctuation on n-type ge junctionless FinFETs with metal–interlayer–semiconductor source/drain contact structure SG Jung, HY Yu IEEE Journal of the Electron Devices Society 7, 1119-1124, 2019 | 6 | 2019 |
| Effects of metal–interlayer–semiconductor source/drain contact structure on n-type germanium junctionless FinFETs SG Jung, SH Kim, GS Kim, HY Yu IEEE Transactions on Electron Devices 65 (8), 3136-3141, 2018 | 6 | 2018 |
| LER-induced random variation–immune effect of metal-interlayer–semiconductor source/drain structure on N-type Ge Junctionless FinFETs SG Jung, E Park, C Shin, HY Yu IEEE Transactions on Electron Devices 68 (3), 1340-1345, 2021 | 3 | 2021 |
| Junctionless field-effect transistor having metal-interlayer-semiconductor structure and manufacturing method thereof HY Yu, SG Jung US Patent 11,430,889, 2022 | 2 | 2022 |
| Performance analysis and design of FET-embedded capacitive micromachined ultrasonic transducer (CMUT) SG Jung, J Kim, KS Hwang, HY Yu, BC Lee 2016 IEEE International Ultrasonics Symposium (IUS), 1-4, 2016 | 2 | 2016 |
| Multi-objective optimization and inverse design of complementary field-effect transistor using combined approach of machine learning and non-dominated sorting genetic … S Kim, SJ Min, SG Jung, HY Yu Engineering Applications of Artificial Intelligence 137, 109064, 2024 | 1 | 2024 |
| Performance evaluation of 7nm n-type germanium junctionless field-effect-transistor with metal-interlayer-semiconductor source/drain structure SG Jung, HY Yu 2017 International Conference on Electron Devices and Solid-State Circuits …, 2017 | 1 | 2017 |
| Performance Improvement in DRAM Cell Using Novel Nitride/Metal Spacers Structure SG Jung, SJ Min, HY Yu IEEE Access, 2024 | | 2024 |
| Semiconductor device including recess gate structure and method of manufacturing the same HY Yu, SG JUNG, MY SON US Patent App. 18/626,346, 2024 | | 2024 |
| Semiconductor device including recess gate structure and method of manufacturing the same HY Yu, SG Jung, MY Son US Patent 11,978,795, 2024 | | 2024 |
| Semiconductor device HY Yu, SG JUNG US Patent App. 17/956,191, 2023 | | 2023 |