Takip et
Shahar Kvatinsky
Shahar Kvatinsky
Technion - Israel Institute of Technology
ee.technion.ac.il üzerinde doğrulanmış e-posta adresine sahip - Ana Sayfa
Başlık
Alıntı yapanlar
Alıntı yapanlar
Yıl
TEAM: Threshold adaptive memristor model
S Kvatinsky, EG Friedman, A Kolodny, UC Weiser
IEEE transactions on circuits and systems I: regular papers 60 (1), 211-221, 2012
9772012
MAGIC–memristor aided LoGIC
S Kvatinsky, D Belousov, S Liman, G Satat, N Wald, EG Friedman, ...
IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 895 - 899, 2014
9382014
VTEAM: A general model for voltage-controlled memristors
S Kvatinsky, M Ramadan, EG Friedman, A Kolodny
IEEE Transactions on Circuits and Systems II: Express Briefs 62 (8), 786-790, 2015
8812015
Memristor-based material implication (imply) logic: Design principles and methodologies
S Kvatinsky, G Satat, N Wald, EG Friedman, A Kolodny, UC Weiser
IEEE Transaction on VLSI 22 (10), 2054 - 2066, 2014
7312014
MRL—Memristor ratioed logic
S Kvatinsky, N Wald, G Satat, A Kolodny, UC Weiser, EG Friedman
2012 13th International Workshop on Cellular Nanoscale Networks and their …, 2012
3742012
Logic design within memristive memories using memristor-aided loGIC (MAGIC)
N Talati, S Gupta, P Mane, S Kvatinsky
IEEE Transactions on Nanotechnology 15 (4), 635-650, 2016
3612016
Memristor-based multilayer neural networks with online gradient descent training
D Soudry, D Di Castro, A Gal, A Kolodny, S Kvatinsky
IEEE transactions on neural networks and learning systems 26 (10), 2408-2421, 2015
3192015
Memristor-based IMPLY Logic Design Procedure
S Kvatinsky, A Kolodny, UC Weiser, EG Friedman
ICCD, 2011
2022011
Dark memory and accelerator-rich system optimization in the dark silicon era
A Pedram, S Richardson, M Horowitz, S Galal, S Kvatinsky
IEEE Design & Test 34 (2), 39-50, 2016
1672016
Memristor for computing: Myth or reality?
S Hamdioui, S Kvatinsky, G Cauwenberghs, L Xie, N Wald, S Joshi, ...
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
1552017
Models of memristors for SPICE simulations
S Kvatinsky, K Talisveyberg, D Fliter, A Kolodny, UC Weiser, EG Friedman
2012 IEEE 27th Convention of electrical and electronics engineers in Israel, 1-5, 2012
148*2012
Sneak-path constraints in memristor crossbar arrays
Y Cassuto, S Kvatinsky, E Yaakobi
2013 IEEE international symposium on information theory, 156-160, 2013
1422013
Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing
L Danial, E Pikhay, E Herbelin, N Wainstein, V Gupta, N Wald, Y Roizin, ...
Nature Electronics 2 (12), 596-605, 2019
1342019
Logic operations in memory using a memristive Akers array
Y Levy, J Bruck, Y Cassuto, EG Friedman, A Kolodny, E Yaakobi, ...
Microelectronics Journal 45 (11), 1429-1437, 2014
1252014
Resistive associative processor
L Yavits, S Kvatinsky, A Morad, R Ginosar
IEEE Computer Architecture Letters 14 (2), 148-151, 2014
1172014
SIMPLER MAGIC: Synthesis and mapping of in-memory logic executed in a single row to improve throughput
R Ben-Hur, R Ronen, A Haj-Ali, D Bhattacharjee, A Eliahu, N Peled, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
1002019
SIMPLE MAGIC: Synthesis and in-memory mapping of logic execution for memristor-aided logic
RB Hur, N Wald, N Talati, S Kvatinsky
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 225-232, 2017
962017
The desired memristor for circuit designers
S Kvatinsky, EG Friedman, A Kolodny, UC Weiser
IEEE Circuits and Systems Magazine 13 (2), 17-22, 2013
962013
Memristive logic: A framework for evaluation and comparison
J Reuben, R Ben-Hur, N Wald, N Talati, AH Ali, PE Gaillardon, ...
2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017
912017
Experimental demonstration of memristor-aided logic (MAGIC) using valence change memory (VCM)
B Hoffer, V Rana, S Menzel, R Waser, S Kvatinsky
IEEE Transactions on Electron Devices 67 (8), 3115-3122, 2020
842020
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