| Lordcore: Energy-efficient opencl-programmable software-defined radio coprocessor H Kultala, T Viitanen, H Berg, P Jääskeläinen, J Multanen, M Kokkonen, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (5 …, 2019 | 16 | 2019 |
| OpenASIP 2.0: Co-design toolset for RISC-V application-specific instruction-set processors K Hepola, J Multanen, P Jääskeläinen 2022 IEEE 33rd International Conference on Application-specific Systems …, 2022 | 15 | 2022 |
| SHRIMP: Efficient instruction delivery with domain wall memory J Multanen, P Jääskeläinen, AA Khan, F Hameed, J Castrillon 2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019 | 14 | 2019 |
| Instantaneous foveated preview for progressive Monte Carlo rendering MK Koskela, KV Immonen, TT Viitanen, PO Jääskeläinen, JI Multanen, ... Computational visual media 4, 267-276, 2018 | 12 | 2018 |
| System simulation of memristor based computation in memory platforms A BanaGozar, K Vadivel, J Multanen, P Jääskeläinen, S Stuijk, ... Embedded Computer Systems: Architectures, Modeling, and Simulation: 20th …, 2020 | 10 | 2020 |
| LoTTA: Energy-Efficient Processor for Always-on Applications J Multanen, H Kultala, P Jääskeläinen, T Viitanen, A Tervo, J Takala | 10 | 2018 |
| Foveated instant preview for progressive rendering M Koskela, K Immonen, T Viitanen, P Jääskeläinen, J Multanen, J Takala SIGGRAPH Asia 2017 technical briefs, 1-4, 2017 | 7 | 2017 |
| Efficient OpenCL system integration of non-blocking FPGA accelerators T Leppänen, A Lotvonen, P Mousouliotis, J Multanen, G Keramidas, ... Microprocessors and Microsystems 97, 104772, 2023 | 6 | 2023 |
| Energy efficient low latency multi-issue cores for intelligent always-on IoT applications J Multanen, H Kultala, K Tervo, P Jääskeläinen Journal of Signal Processing Systems 92 (10), 1057-1073, 2020 | 6 | 2020 |
| Unified OpenCL integration methodology for FPGA designs T Leppänen, P Mousouliotis, G Keramidas, J Multanen, P Jääskeläinen 2021 IEEE Nordic Circuits and Systems Conference (NorCAS), 1-7, 2021 | 5 | 2021 |
| Energy-efficient instruction streams for embedded processors J Multanen Tampere University, 2021 | 4 | 2021 |
| Programmable dictionary code compression for instruction stream energy efficiency J Multanen, K Hepola, P Jääskeläinen 2020 IEEE 38th International Conference on Computer Design (ICCD), 356-363, 2020 | 4 | 2020 |
| Impact of operand sharing to the processor energy efficiency H Kultala, J Multanen, P Jääskeläinen, T Viitanen, J Takala 2015 18th CSI International Symposium on Computer Architecture and Digital …, 2015 | 4 | 2015 |
| Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode K Hepola, J Multanen, P Jääskeläinen IEEE Transactions on Computers 73 (2), 560-573, 2023 | 3 | 2023 |
| AEx: Automated high-level synthesis of compiler programmable co-processors A Hirvonen, T Leppänen, K Hepola, J Multanen, J Hoozemans, ... Journal of Signal Processing Systems 95 (9), 1051-1065, 2023 | 3 | 2023 |
| Energy-efficient instruction delivery in embedded systems with domain wall memory J Multanen, K Hepola, AA Khan, J Castrillon, P Jääskeläinen IEEE Transactions on Computers 71 (9), 2010-2021, 2021 | 3 | 2021 |
| Power optimizations for transport triggered SIMD processors J Multanen, T Viitanen, H Linjamäki, H Kultala, P Jääskeläinen, J Takala, ... Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS …, 2015 | 3 | 2015 |
| AFOCL: Portable OpenCL programming of FPGAs via automated built-in kernel management T Leppänen, J Multanen, L Leppänen, P Jääskeläinen 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), 1-7, 2023 | 2 | 2023 |
| Energy-Delay Trade-offs in Instruction Register File Design J Multanen, H Kultala, P Jääskeläinen | 2 | 2018 |
| Customized high performance low power processor for binaural speaker localization N Behmann, C Seifert, G Paya-Vaya, H Blume, P Jääskeläinen, ... 2016 IEEE International Conference on Electronics, Circuits and Systems …, 2016 | 2 | 2016 |
Pekka JääskeläinenAssociate Professor in Tampere University, Principal Engineer in Inteltuni.fi üzerinde doğrulanmış e-posta adresine sahip