| FPGA-based multi-level approximate multipliers for high-performance error-resilient applications N Van Toan, JG Lee IEEE Access 8, 25481-25497, 2020 | 82 | 2020 |
| Implications of Rent's rule for NoC design and its fault-tolerance D Greenfield, A Banerjee, JG Lee, S Moore First International Symposium on Networks-on-Chip (NOCS'07), 283-294, 2007 | 78 | 2007 |
| Automatic process-oriented control circuit generation for asynchronous high-level synthesis E Eim, JG Lee, DI Lee Proceedings Sixth International Symposium on Advanced Research in …, 2000 | 35 | 2000 |
| Deep learning application to clinical decision support system in sleep stage classification D Kim, J Lee, Y Woo, J Jeong, C Kim, DK Kim Journal of Personalized Medicine 12 (2), 136, 2022 | 32 | 2022 |
| Design and implementation of binary file similarity evaluation system S Kim, YJ Yoo, J So, JG Lee, J Kim, YW Ko International Journal of Multimedia and Ubiquitous Engineering 9 (1), 1-10, 2014 | 17 | 2014 |
| Effcient Data Deduplication System Considering File Modification Pattern HM Jung, SY Park, JG Lee, YW Ko International Journal of Security and Its Applications 6 (2), 421-426, 2012 | 16 | 2012 |
| Exploring the current consumption of an Intel Edison module for IoT applications DM Tung, N Van Toan, JG Lee 2017 IEEE International Instrumentation and Measurement Technology …, 2017 | 12 | 2017 |
| A low EMI circuit design with asynchronous multi-frequency clocking JG Lee IEICE Transactions on Electronics 97 (12), 1158-1161, 2014 | 12 | 2014 |
| Byte-index Chunking algorithm for data deduplication system I Lkhagvasuren, JM So, JG Lee, C Yoo, YW Ko International Journal of Security and its Applications 7 (5), 415-424, 2013 | 12 | 2013 |
| A design method for heterogeneous adders JG Lee, JA Lee, BS Lee, MD Ercegovac Embedded Software and Systems: Third International Conference, ICESS 2007 …, 2007 | 12 | 2007 |
| Energy-area-efficient approximate multipliers for error-tolerant applications on FPGAs N Van Toan, JG Lee 2019 32nd IEEE International System-on-Chip Conference (SOCC), 336-341, 2019 | 10 | 2019 |
| Design space exploration of SW beamformer on GPU TY Phuong, JG Lee Concurrency and Computation: Practice and Experience 27 (7), 1718-1733, 2015 | 10 | 2015 |
| Data deduplication system for supporting multi-mode HM Jung, WV Park, WY Lee, JG Lee, YW Ko Intelligent Information and Database Systems: Third International Conference …, 2011 | 10 | 2011 |
| Minimizing scheduling delay for multimedia in xen hypervisor JG Lee, KW Hur, YW Ko Advanced Communication and Networking: Third International Conference, ACN …, 2011 | 10 | 2011 |
| An asymptotic performance/energy analysis and optimization of multi-core architectures JG Lee, E Jung, W Shin Distributed Computing and Networking: 10th International Conference, ICDCN …, 2009 | 10 | 2009 |
| A parallel flop synchronizer for bridging asynchronous clock domains SJ Kim, JG Lee, K Kim Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System …, 2004 | 10 | 2004 |
| Design of a multi-frequency clocking circuit on an FPGA and analysis of its EMI emission N Van Toan, DM Tung, JG Lee 2016 Asia-Pacific International Symposium on Electromagnetic Compatibility …, 2016 | 9 | 2016 |
| Low area and high speed SHA-1 implementation EG Jung, D Han, JG Lee 2011 International SoC Design Conference, 365-367, 2011 | 9 | 2011 |
| Intelligent sensor node based a low power ECG monitoring system M Zeng, JG Lee, GS Choi, JA Lee IEICE Electronics Express 6 (9), 560-565, 2009 | 9 | 2009 |
| Performance optimization of synchronous control units for datapaths with variable delay arithmetic units E Kim, DI Lee, H Saito, H Nakamura, JG Lee, T Nanya Proceedings of the 2003 Asia and South Pacific Design Automation Conference …, 2003 | 9 | 2003 |
