The impact of high-/spl kappa/gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs B Cheng, M Cao, R Rao, A Inani, PV Voorde, WM Greene, JMC Stork, ... IEEE Transactions on Electron Devices 46 (7), 1537-1544, 1999 | 468 | 1999 |
The tunnel source (PNPN) n-MOSFET: A novel high performance transistor V Nagavarapu, R Jhaveri, JCS Woo IEEE Transactions on Electron Devices 55 (4), 1013-1019, 2008 | 393 | 2008 |
Effect of pocket doping and annealing schemes on the source-pocket tunnel field-effect transistor R Jhaveri, V Nagavarapu, JCS Woo IEEE Transactions on Electron Devices 58 (1), 80-86, 2010 | 312 | 2010 |
Advanced source/drain engineering for box-shaped ultrashallow junction formation using laser annealing and pre-amorphization implantation in sub-100-nm SOI CMOS SD Kim, CM Park, JCS Woo IEEE Transactions on Electron Devices 49 (10), 1748-1754, 2002 | 312 | 2002 |
A MEMS based amperometric detector for E. coli bacteria using self-assembled monolayers JJ Gau, EH Lan, B Dunn, CM Ho, JCS Woo Biosensors and Bioelectronics 16 (9-12), 745-755, 2001 | 303 | 2001 |
Enhancement-mode quantum-well Ge/sub x/Si/sub 1-x/PMOS DK Nayak, JCS Woo, JS Park, K Wang, KP MacWilliams IEEE Electron Device Letters 12 (4), 154-156, 1991 | 252 | 1991 |
Lifetime of photogenerated carriers in silicon-on-insulator rib waveguides D Dimitropoulos, R Jhaveri, R Claps, JCS Woo, B Jalali Applied Physics Letters 86 (7), 2005 | 249 | 2005 |
High-gain lateral bipolar action in a MOSFET structure S Verdonckt-Vandebroek, SS Wong, JCS Woo, PK Ko IEEE Transactions on Electron Devices 38 (11), 2487-2496, 1991 | 248 | 1991 |
Salicidation process using NiSi and its device application F Deng, RA Johnson, PM Asbeck, SS Lau, WB Dubbelday, T Hsiao, ... Journal of applied physics 81 (12), 8047-8051, 1997 | 245 | 1997 |
High‐mobility p‐channel metal‐oxide‐semiconductor field‐effect transistor on strained Si DK Nayak, JCS Woo, JS Park, KL Wang, KP MacWilliams Applied physics letters 62 (22), 2853-2855, 1993 | 228 | 1993 |
Complementary field effect transistors having strained superlattice structure KL Wang, JC Woo US Patent 5,155,571, 1992 | 184 | 1992 |
Improved subthreshold and output characteristics of source-pocket Si tunnel FET by the application of laser annealing HY Chang, B Adams, PY Chien, J Li, JCS Woo IEEE Transactions on Electron Devices 60 (1), 92-96, 2012 | 169 | 2012 |
Wet oxidation of GeSi strained layers by rapid thermal processing DK Nayak, K Kamjoo, JS Park, JCS Woo, KL Wang Applied physics letters 57 (4), 369-371, 1990 | 158 | 1990 |
Large scale pattern graphene electrode for high performance in transparent organic single crystal field-effect transistors W Liu, BL Jackson, J Zhu, CQ Miao, CH Chung, YJ Park, K Sun, J Woo, ... Acs Nano 4 (7), 3927-3932, 2010 | 148 | 2010 |
Advanced model and analysis of series resistance for CMOS scaling into nanometer regime. II. Quantitative analysis SD Kim, CM Park, JCS Woo IEEE Transactions on Electron Devices 49 (3), 467-472, 2002 | 142 | 2002 |
TCAD-based statistical analysis and modeling of gate line-edge roughness effect on nanoscale MOS transistor performance and scaling SD Kim, H Wada, JCS Woo IEEE transactions on Semiconductor Manufacturing 17 (2), 192-200, 2004 | 136 | 2004 |
Advanced model and analysis of series resistance for CMOS scaling into nanometer regime. I. Theoretical derivation SD Kim, CM Park, JCS Woo IEEE Transactions on Electron Devices 49 (3), 457-466, 2002 | 126 | 2002 |
Chemical vapor deposition of large area few layer graphene on Si catalyzed with nickel films W Liu, CH Chung, CQ Miao, YJ Wang, BY Li, LY Ruan, K Patel, YJ Park, ... Thin solid films 518 (6), S128-S132, 2010 | 114 | 2010 |
Comparison of NMOS and PMOS hot carrier effects from 300 to 77 K M Song, KP MacWilliams, JCS Woo IEEE Transactions on Electron Devices 44 (2), 268-276, 1997 | 112 | 1997 |
Contact resistance in top-gated graphene field-effect transistors BC Huang, M Zhang, Y Wang, J Woo Applied Physics Letters 99 (3), 2011 | 110 | 2011 |