Takip et
Kevin J. M. Martin
Kevin J. M. Martin
Université de Bretagne Sud
univ-ubs.fr üzerinde doğrulanmış e-posta adresine sahip - Ana Sayfa
Başlık
Alıntı yapanlar
Alıntı yapanlar
Yıl
GeCoS: A framework for prototyping custom hardware design flows
A Floc'h, T Yuki, A El-Moussawi, A Morvan, K Martin, M Naullet, M Alle, ...
Source Code Analysis and Manipulation (SCAM), 2013 IEEE 13th International …, 2013
372013
Constraint programming approach to reconfigurable processor extension generation and application compilation
K Martin, C Wolinski, K Kuchcinski, A Floch, F Charot
ACM transactions on Reconfigurable Technology and Systems (TRETS) 5 (2), 1-38, 2012
362012
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation flow for Near-Sensor Ultra-low Power Processing
S Das, KJM Martin, D Rossi, P Coussy, L Benini
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
282018
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE
R Prasad, S Das, KJM Martin, G Tagliavini, P Coussy, L Benini, D Rossi
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020
262020
Constraint-driven instructions selection and application scheduling in the DURASE system
K Martin, C Wolinski, K Kuchcinski, A Floch, F Charot
2009 20th IEEE International Conference on Application-specific Systems …, 2009
262009
Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures
S Das, KJM Martin, P Coussy, D Rossi, L Benini
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 127-132, 2017
252017
A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics
S Das, KJM Martin, P Coussy, D Rossi
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
242018
A 142MOPS/mW integrated programmable array accelerator for smart visual processing
S Das, D Rossi, KJM Martin, P Coussy, L Benini
Circuits and Systems (ISCAS), 2017 IEEE International Symposium on, 1-4, 2017
222017
Constraint-Driven Identification of Application Specific Instructions in the DURASE System
K Martin, C Wolinski, K Kuchcinski, A Floch, F Charot
Embedded Computer Systems: Architectures, Modeling, and Simulation, 194-203, 2009
222009
Twenty Years of Automated Methods for Mapping Applications on CGRA
KJM Martin
2022 IEEE International Parallel and Distributed Processing Symposium …, 2022
202022
A Scalable Design Approach to Efficiently Map Applications on CGRAs
S Das, T Peyret, K Martin, G Corre, M Thevenin, P Coussy
VLSI (ISVLSI), 2016 IEEE Computer Society Annual Symposium on, 655-660, 2016
182016
Notifying memories: a case-study on data-flow applications with NoC interfaces implementation
KJM Martin, M Rizk, MJ Sepulveda, JP Diguet
Proceedings of the 53rd Annual Design Automation Conference, 35, 2016
172016
Broadcast-and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing
HK Mondal, RC Cataldo, CAM Marcon, K Martin, S Deb, JP Diguet
2018 31st IEEE International System-on-Chip Conference (SOCC), 1-6, 2018
162018
Efficient application mapping on CGRAs based on backward simultaneous scheduling/binding and dynamic graph transformations
T Peyret, G Corre, M Thevenin, K Martin, P Coussy
2014 IEEE 25th International Conference on Application-Specific Systems …, 2014
152014
Move based algorithm for runtime mapping of dataflow actors on heterogeneous MPSoCs
TD Ngo, KJM Martin, JP Diguet
Journal of Signal Processing Systems, 1-18, 2015
132015
Floating point CGRA based ultra-low power DSP accelerator
R Prasad, S Das, KJM Martin, P Coussy
Journal of Signal Processing Systems 93 (10), 1159-1171, 2021
122021
An automated design approach to map applications on CGRAs
T Peyret, G Corre, M Thevenin, K Martin, P Coussy
Proceedings of the 24th edition of the great lakes symposium on VLSI, 229-230, 2014
122014
Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications
R Cataldo, R Fernandes, KJM Martin, J Sepulveda, A Susin, C Marcon, ...
Proceedings of the 55th Annual Design Automation Conference, 83, 2018
92018
Hardware based loop optimization for cgra architectures
C Sunny, S Das, KJM Martin, P Coussy
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2021
82021
Run-time remapping algorithm of dataflow actors on NoC-based heterogeneous MPSoCs
M Rizk, KJM Martin, JP Diguet
IEEE Transactions on Parallel and Distributed Systems 33 (12), 3959-3976, 2022
72022
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Makaleler 1–20