Підписатись
In Huh
In Huh
Purdue University, Samsung Electronics
Підтверджена електронна адреса в purdue.edu
Назва
Посилання
Посилання
Рік
Bridging TCAD and AI: Its application to semiconductor design
C Jeong, S Myung, I Huh, B Choi, J Kim, H Jang, H Lee, D Park, K Lee, ...
IEEE Transactions on Electron Devices 68 (11), 5364-5371, 2021
522021
Time-reversal symmetric ode network
I Huh, E Yang, SJ Hwang, J Shin
Advances in Neural Information Processing Systems 33, 19016-19027, 2020
242020
Real-time TCAD: A new paradigm for TCAD in the artificial intelligence era
S Myung, J Kim, Y Jeon, W Jang, I Huh, J Kim, S Han, K Baek, J Ryu, ...
2020 International Conference on Simulation of Semiconductor Processes and …, 2020
212020
Pac-net: A model pruning approach to inductive transfer learning
S Myung, I Huh, W Jang, JM Choe, J Ryu, D Kim, KE Kim, C Jeong
International Conference on Machine Learning, 16240-16252, 2022
132022
Application of deep reinforcement learning to dynamic verification of dram designs
H Choi, I Huh, S Kim, J Ko, C Jeong, H Son, K Kwon, J Chai, Y Park, ...
2021 58th ACM/IEEE Design Automation Conference (DAC), 523-528, 2021
92021
An accurate drain current model of monolayer transition-metal dichalcogenide tunnel FETs
I Huh, S Park, M Shin, WY Choi
IEEE Transactions on Electron Devices 64 (8), 3502-3507, 2017
92017
Subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory for nonvolatile operation
I Huh, WY Cheon, WY Choi
Applied Physics Letters 108 (15), 2016
92016
Method and apparatus for selecting model of machine learning based on meta-learning
JH Ko, JJ Lee, SJ Kim, HUH In, CW Jeong
US Patent 11,681,947, 2023
82023
Comprehensive studies on deep learning applicable to tcad
S Myung, B Choi, W Jang, J Kim, I Huh, JM Choe, YG Kim, DS Kim
Japanese Journal of Applied Physics 62 (SC), SC0808, 2023
62023
Isometric quotient variational auto-encoders for structure-preserving representation learning
I Huh, JM Choe, Y KIM, D Kim
Advances in Neural Information Processing Systems 36, 39075-39087, 2023
42023
Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design system
HUH In, JH Ko, C Hyo-Jin, S Kim, CW Jeong, J Chai, KI Park, Y Park, ...
US Patent 11,281,832, 2022
42022
Method for detecting defects in semiconductor device
HUH In, MC Park, TH Lee, CW Jeong, CY Hwang
US Patent 11,507,801, 2022
22022
Method and system for hybrid model including machine learning model and rule-based model
C Jeong, S Myung, HUH In, H Noh, M Park, J Hyunjae
US Patent App. 16/910,908, 2021
22021
Modeling method of neural network for simulation in semiconductor design process, simulation method in semiconductor design process using the same, manufacturing method of …
Y Nam, B Kang, H Moon, C Byungseon, J Choe, J Hyunjae, HUH In
US Patent App. 18/171,550, 2024
12024
Electronic devices generating verification vector for verifying semiconductor circuit and methods of operating the same
KIM Seungju, C Hyojin, HUH In, J Ko, C Jeong, P Younsik, J Chai
US Patent 11,669,773, 2023
12023
Deep learning for semiconductor materials and devices design
C Jeong, S Myung, B Choi, J Kim, W Jang, I Huh, JM Choe, YG Kim, ...
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2023
12023
Simulation system for semiconductor process and simulation method thereof
S Myung, J Hyunjae, HUH In, HK Noh, MC Park, C Jeong
US Patent 11,574,095, 2023
12023
Computing device, operating method of computing device, and storage medium
HUH In, S Myung, J Wonik, C Jeong
US Patent App. 16/907,780, 2021
12021
Method and apparatus with system verification based on reinforcement learning
JH Lee, OH Youngmin, HS Park, Y Lee, LEE Jaecheol, C Hyojin, ...
US Patent 12,175,177, 2024
2024
Method, device, and system for estimating threshold value of kernel density function with respect to defect of product
S Bae, AN Taeyoon, J You, HUH In, M Cha, J Choe
US Patent App. 18/544,065, 2024
2024
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