| SHARP: A short-word hierarchical accelerator for robust and practical fully homomorphic encryption J Kim, S Kim, J Choi, J Park, D Kim, JH Ahn Proceedings of the 50th Annual International Symposium on Computer …, 2023 | 50 | 2023 |
| MViD: Sparse matrix-vector multiplication in mobile DRAM for accelerating recurrent neural networks B Kim, J Chung, E Lee, W Jung, S Lee, J Choi, J Park, M Wi, S Lee, ... IEEE Transactions on Computers 69 (7), 955-967, 2020 | 36 | 2020 |
| Comparing BERT and XLNet from the perspective of computational characteristics H Li, J Choi, S Lee, JH Ahn 2020 International Conference on Electronics, Information, and Communication …, 2020 | 18 | 2020 |
| Accelerating transformer networks through recomposing softmax layers J Choi, H Li, B Kim, S Hwang, JH Ahn 2022 IEEE International Symposium on Workload Characterization (IISWC), 92-103, 2022 | 15 | 2022 |
| Unleashing the potential of pim: Accelerating large batched inference of transformer-based generative models J Choi, J Park, K Kyung, NS Kim, JH Ahn IEEE Computer Architecture Letters 22 (2), 113-116, 2023 | 13 | 2023 |
| AttAcc! Unleashing the power of PIM for batched transformer-based generative model inference J Park, J Choi, K Kyung, MJ Kim, Y Kwon, NS Kim, JH Ahn Proceedings of the 29th ACM International Conference on Architectural …, 2024 | 12 | 2024 |
| Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device S Seo, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ... US Patent 11,139,033, 2021 | 10 | 2021 |
| Row-streaming dataflow using a chaining buffer and systolic array+ structure H Kim, S Lee, J Choi, JH Ahn IEEE Computer Architecture Letters 20 (1), 34-37, 2021 | 7 | 2021 |
| MVP: An efficient CNN accelerator with matrix, vector, and processing-near-memory units S Lee, J Choi, W Jung, B Kim, J Park, H Kim, JH Ahn ACM Transactions on Design Automation of Electronic Systems (TODAES) 27 (5 …, 2022 | 6 | 2022 |
| Future scaling of memory hierarchy for tensor cores and eliminating redundant shared memory traffic using inter-warp multicasting S Lee, S Hwang, MJ Kim, J Choi, JH Ahn IEEE Transactions on Computers 71 (12), 3115-3126, 2022 | 5 | 2022 |
| Duplex: A Device for Large Language Models with Mixture of Experts, Grouped Query Attention, and Continuous Batching S Yun, K Kyung, J Cho, J Choi, J Kim, B Kim, S Lee, K Sohn, JH Ahn 2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2024 | 4 | 2024 |
| A slice and dice approach to accelerate compound sparse attention on GPU H Li, J Choi, JH Ahn 2022 IEEE International Symposium on Workload Characterization (IISWC), 104-116, 2022 | 3 | 2022 |
| A hardware-friendly tiled singular-value decomposition-based matrix multiplication for transformer-based models H Li, J Choi, Y Kwon, JH Ahn IEEE Computer Architecture Letters 22 (2), 169-172, 2023 | 2 | 2023 |
| Method and apparatus with data processing Y Ro, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ... US Patent 11,436,477, 2022 | 1 | 2022 |
| Accelerating Programmable Bootstrapping Targeting Contemporary GPU Microarchitecture H Ji, S Kim, J Choi, JH Ahn IEEE Computer Architecture Letters, 2024 | | 2024 |
| Method and apparatus with data processing Y Ro, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ... US Patent 11,886,985, 2024 | | 2024 |
| Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device S Seo, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ... US Patent 11,600,340, 2023 | | 2023 |
