Phase/frequency synthesis using periodic sigma-delta modulated bit-stream techniques G Roberts, S Aouini US Patent 8,855,215, 2014 | 40 | 2014 |
Temporal epilepsy seizures monitoring and prediction using cross‐correlation and chaos theory T Haddad, N Ben‐Hamida, L Talbi, A Lakhssassi, S Aouini Healthcare technology letters 1 (1), 45-50, 2014 | 29 | 2014 |
Anti-imaging time-mode filter design using a PLL structure with transfer function DFT S Aouini, K Chuai, GW Roberts IEEE Transactions on Circuits and Systems I: Regular Papers 59 (1), 66-79, 2011 | 25 | 2011 |
Mixed-signal production test: A measurement principle perspective GW Roberts, S Aouini IEEE Design & Test of Computers 26 (5), 48-62, 2009 | 25* | 2009 |
Optical clock recovery using feedback phase rotator with non-linear compensation S Aouini, N Ben-Hamida, C Kurowski, L Jakober US Patent 10,063,367, 2018 | 21 | 2018 |
A low-cost ATE phase signal generation technique for test applications S Aouini, K Chuai, GW Roberts 2010 IEEE International Test Conference, 1-10, 2010 | 20 | 2010 |
Generation of an analog Gaussian noise signal having predetermined characteristics S Aouini, GW Roberts US Patent 8,849,882, 2014 | 18 | 2014 |
Analysis and Modeling of the Phase Detector Hysteresis in Bang-Bang PLLs S Bashiri, S Aouini, N Ben-Hamida, C Plett Transactions on circuits and systems, 2014 | 17 | 2014 |
A predictable robust fully programmable analog Gaussian noise source for mixed-signal/digital ATE S Aouini, GW Roberts 2006 IEEE International Test Conference, 1-10, 2006 | 16 | 2006 |
A 60 GS/s 8-b DAC with> 29.5 dB SINAD up to Nyquist frequency in 7nm FinFET CMOS Y Greshishchev, J Aguirre, S Aouini, M Besson, R Gibbins, CY Gouk, ... 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and …, 2019 | 15 | 2019 |
Fine resolution high speed linear delay element M Parvizi, S Aouini, N Ben-Hamida US Patent 10,320,374, 2019 | 14 | 2019 |
An area-efficient high-resolution segmented ΣΔ-DAC for built-in self-test applications AS Emara, D Romanov, GW Roberts, S Aouini, S Ziabakhsh, M Parvizi, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (11 …, 2021 | 12 | 2021 |
Coarse-fine gain-tracking loop and method of operating S Aouini, T Luk, N Ben-Hamida, C Kurowski, M Honarparvar, ... US Patent 10,715,169, 2020 | 10 | 2020 |
Successive approximation register analog to digital converter based phase-locked loop with programmable range SZ Shalmani, S Aouini, M Mikkelsen, H Beshara, T Wen, M Honarparvar, ... US Patent 10,979,059, 2021 | 9 | 2021 |
Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset S Aouini, N Ben-Hamida, M Parvizi US Patent 10,680,585, 2020 | 9 | 2020 |
Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators S Aouini, A Emara, G Roberts, M Parvizi, N Ben-Hamida US Patent 10,425,099, 2019 | 9 | 2019 |
A memory-based direct-digital frequency synthesizer for fractional synchronization S Ziabakhsh, S Aouini, RG Gibbins, M Mikkelsen, S Moslemi-Tabrizi, ... IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 899-903, 2021 | 8 | 2021 |
Apparatus and methods for high frequency clock generation M Parvizi, S Aouini, N Ben-Hamida, Y Greshishchev, DS McPherson, ... US Patent 10,903,841, 2021 | 8 | 2021 |
Apparatus and methods for digital phase locked loop with analog proportional control function M Parvizi, S Aouini, N Ben-Hamida US Patent 10,715,155, 2020 | 8 | 2020 |
Clock recovery circuits, systems and implementation for increased optical channel density S Aouini, B Riaz, N Ben-Hamida, L Jakober, A Abdo US Patent 10,243,671, 2019 | 8 | 2019 |