| A very high speed true random number generator with entropy assessment A Cherkaoui, V Fischer, L Fesquet, A Aubert Cryptographic Hardware and Embedded Systems-CHES 2013: 15th International …, 2013 | 152 | 2013 |
| Implementation and characterization of a physical unclonable function for IoT: A case study with the TERO-PUF C Marchand, L Bossuet, U Mureddu, N Bochard, A Cherkaoui, V Fischer IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 145 | 2017 |
| A self-timed ring based true random number generator A Cherkaoui, V Fischer, A Aubert, L Fesquet 2013 IEEE 19th international symposium on asynchronous circuits and systems …, 2013 | 91 | 2013 |
| Design, evaluation, and optimization of physical unclonable functions based on transient effect ring oscillators A Cherkaoui, L Bossuet, C Marchand IEEE Transactions on Information Forensics and Security 11 (6), 1291-1305, 2016 | 73 | 2016 |
| New paradigms for access control in constrained environments A Cherkaoui, L Bossuet, L Seitz, G Selander, R Borgaonkar 2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014 | 54 | 2014 |
| Static Timing Analysis of Asynchronous Bundled-Data Circuits G Gimenez, A Cherkaoui, G Cogniard, L Fesquet 2018 24th IEEE International Symposium on Asynchronous Circuits and Systems …, 2018 | 41 | 2018 |
| Comparison of self-timed ring and inverter ring oscillators as entropy sources in FPGAs A Cherkaoui, V Fischer, A Aubert, L Fesquet 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 39 | 2012 |
| Multi-phase low-noise digital ring oscillators with sub-gate-delay resolution O Elissati, A Cherkaoui, A El-Hadbi, S Rieubon, L Fesquet AEU-International Journal of Electronics and Communications 84, 74-83, 2018 | 16 | 2018 |
| A Practical Framework for Specification, Verification, and Design of Self-Timed Pipelines J Simatic, A Cherkaoui, F Bertrand, RP Bastos, L Fesquet 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems …, 2017 | 16 | 2017 |
| New asynchronous protocols for enhancing area and throughput in bundled-data pipelines J Simatic, A Cherkaoui, RP Bastos, L Fesquet Proceedings of the 29th Symposium on Integrated Circuits and Systems Design …, 2016 | 12 | 2016 |
| Self-timed Ring based True Random Number Generator: Threat model and countermeasures G Gimenez, A Cherkaoui, R Frisch, L Fesquet 2017 IEEE 2nd International Verification and Security Workshop (IVSW), 31-38, 2017 | 11 | 2017 |
| On-the-fly and sub-gate-delay resolution TDC based on self-timed ring: A proof of concept A El-Hadbi, A Cherkaoui, O Elissati, J Simatic, L Fesquet 2017 15th IEEE international new circuits and systems conference (NEWCAS …, 2017 | 11 | 2017 |
| Design and Characterization of the TERO-PUF on SRAM FPGAs C Marchand, L Bossuet, A Cherkaoui 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 134-139, 2016 | 11 | 2016 |
| Self-timed rings as low-phase noise programmable oscillators L Fesquet, A Cherkaoui, O Elissati 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS …, 2014 | 10 | 2014 |
| A Self-Timed Ring based PUF G Gimenez, A Cherkaoui, L Fesquet 2020 26th IEEE International Symposium on Asynchronous Circuits and Systems …, 2020 | 6 | 2020 |
| An accurate time-to-digital converter based on a self-timed ring oscillator for on-the-fly time measurement A El-Hadbi, A Cherkaoui, O Elissati, J Simatic, L Fesquet Analog Integrated Circuits and Signal Processing 97, 471-481, 2018 | 6 | 2018 |
| CAR: On the highway towards de-synchronization F Bertrand, A Cherkaoui, J Simatic, A Maure, L Fesquet 2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017 | 6 | 2017 |
| Subthreshold logic for low-area and energy efficient true random number generator M Coustans, A Cherkaoui, L Fesquet, C Terrier, S Salgado, T Eberhardt, ... 2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-3, 2018 | 5 | 2018 |
| A subthreshold 30pJ/bit self-timed ring based true random number generator for internet of everything M Coustans, C Terrier, T Eberhardt, S Salgado, A Cherkaoui, L Fesquet 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2017 | 5 | 2017 |
| Enhanced TERO-PUF implementations and characterization on FPGAs C Marchand, L Bossuet, A Cherkaoui Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 4 | 2016 |
Laurent FesquetGrenoble INP - Université Grenoble AlpesEmail được xác minh tại univ-grenoble-alpes.fr
