| Comparative analyses of circular gate TFET and heterojunction TFET for dielectric-modulated label-free biosensing R Goswami, B Bhowmick IEEE Sensors Journal 19 (21), 9600-9609, 2019 | 170 | 2019 |
| N+ pocket doped vertical TFET based dielectric-modulated biosensor considering non-ideal hybridization issue: A simulation study VD Wangkheirakpam, B Bhowmick, PD Pukhrambam IEEE Transactions on Nanotechnology 19, 156-162, 2020 | 137 | 2020 |
| Temperature effect on RF/analog and linearity parameters in DMG FinFET R Saha, B Bhowmick, S Baishya Applied Physics A 124, 1-10, 2018 | 95 | 2018 |
| Investigation of a Ge-source vertical TFET with delta-doped layer K Vanlalawpuia, B Bhowmick IEEE Transactions on Electron Devices 66 (10), 4439-4445, 2019 | 86 | 2019 |
| Review of FinFET devices and perspective on circuit design challenges RK Maurya, B Bhowmick Silicon 14 (11), 5783-5791, 2022 | 68 | 2022 |
| N+ pocket-doped vertical TFET for enhanced sensitivity in biosensing applications: modeling and simulation WV Devi, B Bhowmick, PD Pukhrambam IEEE Transactions on Electron Devices 67 (5), 2133-2139, 2020 | 65 | 2020 |
| Heterojunction fully depleted SOI-TFET with oxide/source overlap S Chander, B Bhowmick, S Baishya Superlattices and Microstructures 86, 43-50, 2015 | 57 | 2015 |
| A hetero-dielectric stack gate SOI-TFET with back gate and its application as a digital inverter SK Mitra, R Goswami, B Bhowmick Superlattices and Microstructures 92, 37-51, 2016 | 54 | 2016 |
| Electrical noise in circular gate tunnel FET in presence of interface traps R Goswami, B Bhowmick, S Baishya Superlattices and Microstructures 86, 342-354, 2015 | 53 | 2015 |
| Effect of scaling on noise in circular gate TFET and its application as a digital inverter R Goswami, B Bhowmick, S Baishya Microelectronics Journal 53, 16-24, 2016 | 51 | 2016 |
| Analysis of hetero-stacked source TFET and heterostructure vertical TFET as dielectrically modulated label-free biosensors K Vanlalawmpuia, B Bhowmick IEEE Sensors Journal 22 (1), 939-947, 2021 | 50 | 2021 |
| An analytical model of drain current in a nanoscale circular gate TFET R Goswami, B Bhowmick IEEE Transactions on Electron Devices 64 (1), 45-51, 2016 | 44 | 2016 |
| Optimisation of pocket doped junctionless TFET and its application in digital inverter WV Devi, B Bhowmick Micro & Nano Letters 14 (1), 69-73, 2019 | 42 | 2019 |
| TFET on Selective Buried Oxide (SELBOX) Substrate with Improved ION/IOFF Ratio and Reduced Ambipolar Current D Barah, AK Singh, B Bhowmick Silicon 11 (2), 973-981, 2019 | 39 | 2019 |
| Statistical dependence of gate metal work function on various electrical parameters for an n-channel Si step-FinFET R Saha, B Bhowmick, S Baishya IEEE Transactions on Electron Devices 64 (3), 969-976, 2017 | 38 | 2017 |
| Dependence of RF/analog and linearity figure of merits on temperature in ferroelectric FinFET: a simulation study R Saha, R Goswami, B Bhowmick, S Baishya IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control 67 …, 2020 | 33 | 2020 |
| Noise behavior of ferro electric tunnel FET B Das, B Bhowmick Microelectronics Journal 96, 104677, 2020 | 33 | 2020 |
| Scaling of dopant segregation Schottky barrier using metal strip buried oxide MOSFET and its comparison with conventional device P Kumar, WasimArif, B Bhowmick Silicon 10, 811-820, 2018 | 33 | 2018 |
| 3D analytical modeling of surface potential, threshold voltage, and subthreshold swing in dual-material-gate (DMG) SOI FinFETs R Saha, S Baishya, B Bhowmick Journal of Computational Electronics 17, 153-162, 2018 | 32 | 2018 |
| Analysis on effect of lateral straggle on analog, high frequency and DC parameters in Ge‐source DMDG TFET R Saha, DK Panda, R Goswami, B Bhowmick, S Baishya International Journal of RF and Microwave Computer‐Aided Engineering 31 (4 …, 2021 | 30 | 2021 |
Srimanta BaishyaNIT Silchar在 nits.ac.in 的电子邮件经过验证