| Vertical InAs Nanowire Wrap Gate Transistors with ft > 7 GHz and fmax > 20 GHz M Egard, S Johansson, AC Johansson, KM Persson, AW Dey, BM Borg, ... Nano Letters 10 (3), 809-812, 2010 | 138 | 2010 |
| A High-Frequency Transconductance Method for Characterization of High- Border Traps in III-V MOSFETs S Johansson, M Berg, KM Persson, E Lind IEEE Transactions on Electron Devices 60 (2), 776-781, 2012 | 90 | 2012 |
| Tuning oxygen vacancies and resistive switching properties in ultra-thin HfO2 RRAM via TiN bottom electrode and interface engineering Z Yong, KM Persson, MS Ram, G D'Acunto, Y Liu, S Benter, J Pan, Z Li, ... Applied Surface Science 551, 149386, 2021 | 87 | 2021 |
| High-Frequency Performance of Self-Aligned Gate-Last Surface ChannelMOSFET M Egard, L Ohlsson, M Arlelid, KM Persson, BM Borg, F Lenrick, ... IEEE Electron Device Letters 33 (3), 369-371, 2012 | 79 | 2012 |
| Extrinsic and intrinsic performance of vertical InAs nanowire MOSFETs on Si substrates KM Persson, M Berg, MB Borg, J Wu, S Johansson, J Svensson, ... IEEE Transactions on Electron Devices 60 (9), 2761-2767, 2013 | 76 | 2013 |
| Low-temperature side contact to carbon nanotube transistors: Resistance distributions down to 10 nm contact length G Pitner, G Hills, JP Llinas, KM Persson, R Park, J Bokor, S Mitra, ... Nano letters 19 (2), 1083-1089, 2019 | 60 | 2019 |
| Reduced annealing temperature for ferroelectric HZO on InAs with enhanced polarization AEO Persson, R Athle, P Littow, KM Persson, J Svensson, M Borg, ... Applied Physics Letters 116 (6), 2020 | 41 | 2020 |
| Low-frequency noise in vertical InAs nanowire FETs KM Persson, E Lind, AW Dey, C Thelander, H Sjöland, LE Wernersson IEEE Electron Device Letters 31 (5), 428-430, 2010 | 41 | 2010 |
| High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon MS Ram, KM Persson, A Irish, A Jönsson, R Timm, LE Wernersson Nature Electronics 4 (12), 914-920, 2021 | 40 | 2021 |
| Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si M Berg, KM Persson, OP Kilpi, J Svensson, E Lind, LE Wernersson 2015 IEEE International Electron Devices Meeting (IEDM), 31.2. 1-31.2. 4, 2015 | 40 | 2015 |
| Electrical characterization and modeling of gate-last vertical InAs nanowire MOSFETs on Si M Berg, OP Kilpi, KM Persson, J Svensson, M Hellenbrand, E Lind, ... IEEE Electron Device Letters 37 (8), 966-969, 2016 | 35 | 2016 |
| Surface and core contribution to 1/f-noise in InAs nanowire metal-oxide-semiconductor field-effect transistors KM Persson, BG Malm, LE Wernersson Applied Physics Letters 103 (3), 2013 | 32 | 2013 |
| Cross‐Point Arrays with Low‐Power ITO‐HfO2 Resistive Memory Cells Integrated on Vertical III‐V Nanowires KM Persson, MS Ram, OP Kilpi, M Borg, LE Wernersson Advanced Electronic Materials 6 (6), 2000154, 2020 | 28 | 2020 |
| Hard X-ray detection using a single 100 nm diameter nanowire J Wallentin, M Osterhoff, RN Wilke, KM Persson, LE Wernersson, ... Nano letters 14 (12), 7071-7076, 2014 | 27 | 2014 |
| Low-power resistive memory integrated on III–V vertical nanowire MOSFETs on silicon MS Ram, KM Persson, M Borg, LE Wernersson IEEE Electron Device Letters 41 (9), 1432-1435, 2020 | 23 | 2020 |
| Ultra-Scaled AlOx Diffusion Barriers for Multibit HfOx RRAM Operation KM Persson, MS Ram, LE Wernersson IEEE Journal of the Electron Devices Society 9, 564-569, 2021 | 18 | 2021 |
| InAs nanowire MOSFET differential active mixer on Si‐substrate KM Persson, M Berg, H Sjöland, E Lind, LE Wernersson Electronics Letters 50 (9), 682-683, 2014 | 12 | 2014 |
| InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers M Berg, KM Persson, J Wu, E Lind, H Sjöland, LE Wernersson Nanotechnology 25 (48), 485203, 2014 | 9 | 2014 |
| Vertical InAs nanowire MOSFETs with IDS= 1.34 mA/µm and gm= 1.19 mS/µm at VDS= 0.5 V KM Persson, M Berg, M Borg, J Wu, H Sjöland, E Lind, LE Wernersson 70th Device Research Conference, 195-196, 2012 | 7 | 2012 |
| A 4F2 Vertical Gate-all-around Nanowire Compute-in-memory Device Integrated in (1T1R) Cross-Point Arrays on Silicon MS Ram, KM Persson, LE Wernersson 2022 IEEE Silicon Nanoelectronics Workshop (SNW), 1-2, 2022 | 4 | 2022 |