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Ziyi Wang
Ziyi Wang
the Chinese University of Hong Kong; the University of Texas at Austin
在 link.cuhk.edu.hk 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
Functionality matters in netlist representation learning
Z Wang, C Bai, Z He, G Zhang, Q Xu, TY Ho, B Yu, Y Huang
Proceedings of the 59th ACM/IEEE Design Automation Conference, 61-66, 2022
382022
Graph learning-based arithmetic block identification
Z He*, Z Wang*, C Bai, H Yang, B Yu
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-8, 2021
292021
The dawn of ai-native eda: Promises and challenges of large circuit models
L Chen, Y Chen, Z Chu, W Fang, TY Ho, Y Huang, S Khan, M Li, X Li, ...
arXiv preprint arXiv:2403.07257, 2024
202024
Restructure-tolerant timing prediction via multimodal fusion
Z Wang, S Liu, Y Pu, S Chen, TY Ho, B Yu
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
172023
Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement
S Liu*, Z Wang*, F Liu, Y Lin, B Yu, M Wong
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
82023
Efficient arithmetic block identification with graph learning and network-flow
Z Wang, Z He, C Bai, H Yang, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022
52022
Realistic sign-off timing prediction via multimodal fusion
Z Wang, S Liu, Y Pu, S Chen, TY Ho, B Yu
Proc. DAC, 2023
32023
Fgnn2: A powerful pre-training framework for learning the logic functionality of circuits
Z Wang, C Bai, Z He, G Zhang, Q Xu, TY Ho, Y Huang, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
22024
Parsgcn: Bridging the gap between emulation partitioning and scheduling
Z Wang, W Zhao, Y Pu, L Chen, WWK Thong, W Sheng, TY Ho, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
12024
Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs
S Liu, J Jiang, Z He, Z Wang, Y Lin, B Yu, M Wong
Proceedings of the 2024 International Symposium on Physical Design, 75-82, 2024
12024
HeLO: A Heterogeneous Logic Optimization Framework by Hierarchical Clustering and Graph Learning
Y Pu, Z He, K Zhu, R Fu, Z Wang, TY Ho, B Yu
International Symposium on Physical Design (ISPD’25), 2025
2025
GraphCAD: Leveraging Graph Neural Networks for Accuracy Prediction Handling Crosstalk-affected Delays
F Liu, G Guo, Y Ye, Z Wang, W Fu, W Sheng, B Yu
2025
Pre-Routing Timing Prediction Across Different Technology Nodes
X Zhang, B Zhu, F Liu, J Jiang, Z Wang, P Xu, H Xu, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
2024
Sign-Off Timing Considerations via Concurrent Routing Topology Optimization
S Liu*, Z Wang*, F Liu, Y Lin, B Yu, M Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
2024
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