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Reversible logic synthesis using binary decision diagrams with exploiting efficient reordering operators

BK Abdalhaq, A Awad, A Hawash - IEEE Access, 2020 - ieeexplore.ieee.org
With the continuous shrinkage of transistor sizes in very large scale integrated circuits,
power consumption forms a serious concern to be tackled. With their ability to allow for zero …
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[PDF][PDF] Reversible Logic Synthesis Using Binary Decision Diagrams With Exploiting Efficient Reordering Operators

BK ABDALHAQ, A AWAD, A HAWASH - academia.edu
With the continuous shrinkage of transistor sizes in very large scale integrated circuits,
power consumption forms a serious concern to be tackled. With their ability to allow for zero …
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[CITATION][C] Reversible Logic Synthesis Using Binary Decision Diagrams With Exploiting Efficient Reordering Operators

BK Abdalhaq, A Awad, A Hawash - IEEE Access, 2020 - ui.adsabs.harvard.edu
Reversible Logic Synthesis Using Binary Decision Diagrams With Exploiting Efficient
Reordering Operators - NASA/ADS Now on home page ads icon ads Enable full ADS view …
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