Palirria: accurate on-line parallelism estimation for adaptive work-stealing
We present Palirria, a self-adapting work-stealing scheduling method for nested fork/join
parallelism that can be used to estimate the number of utilizable workers and self-adapt …
parallelism that can be used to estimate the number of utilizable workers and self-adapt …
Effective cooperative scheduling of task-parallel applications on multiprogrammed parallel architectures
G Varisteas - 2015 - diva-portal.org
Emerging architecture designs include tens of processing cores on a single chip die; it is
believed that the number of cores will reach the hundreds in not so many years from now …
believed that the number of cores will reach the hundreds in not so many years from now …
Embracing explicit communication in work-stealing runtime systems
A Prell - 2016 - epub.uni-bayreuth.de
Parallel computers are commonplace. The trend of increasing the number of processor
cores highlights the importance of parallel computing: a single-threaded program uses a …
cores highlights the importance of parallel computing: a single-threaded program uses a …
[PDF][PDF] Enabling task parallelism for many-core architectures
PR Atkinson - 2021 - research-information.bris.ac.uk
The requirements placed on computer architectures from modern computational workloads
have driven constant performance improvements. In the last 15 years, the largest source of …
have driven constant performance improvements. In the last 15 years, the largest source of …
[PDF][PDF] Power aware work-stealing in homogeneous multi-core systems
S Shankar, G LaKomski, C Alvarado, R Hay… - … : the Sixth International …, 2014 - academia.edu
Excessive power consumption affects the reliability of cores, requires expensive cooling
mechanisms, reduces battery lifetime, and causes extensive damage to the device. Hence …
mechanisms, reduces battery lifetime, and causes extensive damage to the device. Hence …
[PDF][PDF] Dynamic scheduling in multicore processors
DR Ham - 2012 - research.manchester.ac.uk
An efficient dynamic load balancing system for shared memory chip multiprocessors is
presented in this thesis. This system allows the exploitation of fine grain parallelism on …
presented in this thesis. This system allows the exploitation of fine grain parallelism on …
[PDF][PDF] Understanding the formation of wait states in one-sided communication
MA Hermanns - 2018 - publications.rwth-aachen.de
Due to the available concurrency in modern-day supercomputers, the complexity of
develo** efficient parallel applications for these platforms has grown rapidly in the last …
develo** efficient parallel applications for these platforms has grown rapidly in the last …
Architecture-neutral parallelism via the Join Calculus
PR Calvert - 2015 - cl.cam.ac.uk
Ever since the UNCOL efforts in the 1960s, compilers have sought to use both source-
language-neutral and architecture-neutral intermediate representations. The advent of web …
language-neutral and architecture-neutral intermediate representations. The advent of web …
Cooperative user-and system-level scheduling of task-centric parallel programs
G Varisteas - 2013 - diva-portal.org
Emerging architecture designs include tens of processing cores on a single chip die; it is
believed that the number of cores will reach the hundreds in not so many years from now …
believed that the number of cores will reach the hundreds in not so many years from now …
Porting a C Library for Fine Grained Independent Task Parallelism to Enea OSE RTOS
Y Wang - 2012 - diva-portal.org
Multi-core starts an era to improve the performance of computations by executing
instructions in parallel. However, the improvement in performance is not linear with the …
instructions in parallel. However, the improvement in performance is not linear with the …