Algorithms for state restoration and trace-signal selection for data acquisition in silicon debug

HF Ko, N Nicolici - … Transactions on Computer-Aided Design of …, 2009‏ - ieeexplore.ieee.org
To locate and correct design errors that escape pre-silicon verification, silicon debug has
become a necessary step in the implementation flow of digital integrated circuits. Embedded …

Post-silicon bug localization in processors using instruction footprint recording and analysis (IFRA)

SB Park, T Hong, S Mitra - IEEE Transactions on Computer …, 2009‏ - ieeexplore.ieee.org
Instruction Footprint Recording and Analysis (IFRA) overcomes challenges associated with
an expensive step in post-silicon validation of processors-pinpointing the bug location and …

IFRA: Instruction footprint recording and analysis for post-silicon bug localization in processors

SB Park, S Mitra - Proceedings of the 45th annual Design Automation …, 2008‏ - dl.acm.org
The objective of IFRA, Instruction Footprint Recording and Analysis, is to overcome the
challenges associated with a very expensive step in post-silicon validation of processors …

Respec: efficient online multiprocessor replayvia speculation and external determinism

D Lee, B Wester, K Veeraraghavan… - ACM Sigplan …, 2010‏ - dl.acm.org
Deterministic replay systems record and reproduce the execution of a hardware or software
system. While it is well known how to replay uniprocessor systems, replaying shared …

Voltage emergency prediction: Using signatures to reduce operating margins

VJ Reddi, MS Gupta, G Holloway… - 2009 IEEE 15th …, 2009‏ - ieeexplore.ieee.org
Inductive noise forces microprocessor designers to sacrifice performance in order to ensure
correct and reliable operation of their designs. The possibility of wide fluctuations in supply …

Identifying security critical properties for the dynamic verification of a processor

R Zhang, N Stanley, C Griggs, A Chi… - ACM SIGARCH Computer …, 2017‏ - dl.acm.org
We present a methodology for identifying security critical properties for use in the dynamic
verification of a processor. Such verification has been shown to be an effective way to …

SAT-based automatic rectification and debugging of combinational circuits with LUT insertions

S Jo, T Matsumoto, M Fujita - IPSJ Transactions on System and LSI …, 2014‏ - jstage.jst.go.jp
Introducing partial programmability in circuits by replacing some gates with look up tables
(LUTs) can be an effective way to improve post-silicon or in-field rectification and debugging …

Reverse engineering x86 processor microcode

P Koppe, B Kollenda, M Fyrbiak, C Kison… - 26th USENIX Security …, 2017‏ - usenix.org
Microcode is an abstraction layer on top of the physical components of a CPU and present in
most general-purpose CPUs today. In addition to facilitate complex and vast instruction sets …

Online design bug detection: RTL analysis, flexible mechanisms, and evaluation

K Constantinides, O Mutlu… - 2008 41st IEEE/ACM …, 2008‏ - ieeexplore.ieee.org
Higher level of resource integration and the addition of new features in modern multi-
processors put a significant pressure on their verification. Although a large amount of …

A survey on post-silicon functional validation for multicore architectures

P Jayaraman, R Parthasarathi - ACM Computing Surveys (CSUR), 2017‏ - dl.acm.org
During a processor development cycle, post-silicon validation is performed on the first
fabricated chip to detect and fix design errors. Design errors occur due to functional issues …