Superior performance of 5-nm gate length GaN nanowire nFET for digital logic applications

Y Chu, SC Lu, N Chowdhury… - IEEE Electron …, 2019 - ieeexplore.ieee.org
We investigate the performance of 5-nm gate length GaN nMOS nanowire field effect
transistor (GaN-NWnFET) of various geometrical shapes, around the limits of cross-sectional …

Scalable GaSb/InAs tunnel FETs with nonuniform body thickness

JZ Huang, P Long, M Povolotskyi… - … on Electron Devices, 2016 - ieeexplore.ieee.org
GaSb/InAs heterojunction tunnel FETs are strong candidates in building future low-power
ICs, as they could provide both steep subthreshold swing and large on-state current (I ON) …

Tight-Binding Models, Their Applications to Device Modeling, and Deployment to a Global Community

G Klimeck, T Boykin - Springer Handbook of Semiconductor Devices, 2022 - Springer
Tight-binding has become the state-of-the-art for realistically sized nanoscale device
modeling. It has been implemented by multiple advanced device modeling research groups …

Modeling the Quantum Gate capacitance of Nano-Sheet Gate-All-Around MOSFET

P Kushwaha, H Agarwal, V Mishra… - 2019 IEEE SOI-3D …, 2019 - ieeexplore.ieee.org
Lateral nanosheet field-effect-transistor (FET) is now targeting for 3nm CMOS technology
node [1],[2]. It is important to see quantization effect at such confined geometry. In this work …

nanohub. org: Experiences and challenges in software sustainability for a large scientific community

L Zentner, M Zentner, V Farnsworth… - arxiv preprint arxiv …, 2013 - arxiv.org
nanoHUB.org: Experiences and Challenges in Software Sustainability for a Large Scientific
Community Lynn Zentner, Michael Zentn Page 1 nanoHUB.org: Experiences and Challenges in …

Performance and value of geometric solar arrays subject to cyclical electricity prices and high solar penetration

ABG Boivin - 2019 - open.library.ubc.ca
The shift away from fossil-fuel-based electricity generation due to environmental concerns
has raised substantial interest in photovoltaic generation. However, the intermittent nature of …

Asymmetric underlapped FinFETs for near-and super-threshold logic at sub-10nm technology nodes

AA Goud, R Venkatesan, A Raghunathan… - ACM Journal on …, 2016 - dl.acm.org
Extending double-gate FinFET scaling to sub-10nm technology regime requires device-
engineering techniques for countering the rise of direct source to drain tunneling (DSDT) …

[LIVRE][B] Atomistic Modeling of Coupled Electron-Phonon Transport in Nanostructures

MZ Rashid - 2021 - search.proquest.com
Electronics industry has been develo** at a tremendous rate for last five decades and
currently is one of the biggest industries in the world. The key to the rapid growth of …

Modeling of gate-induced drain leakage mechanisms in silicon-germanium channel pFET

VA Tiwari, A Scholze, R Divakaruni… - 2014 IEEE 2nd …, 2014 - ieeexplore.ieee.org
Silicon-Germanium is used as an alternative channel material for pFET in high-k metal gate-
first technologies for 32 nm and beyond. However, gate-induced drain leakage (GIDL) is …

[LIVRE][B] Toward direct bandgap germanium optoelectronics

WA O'Brien IV - 2016 - search.proquest.com
Germanium was one of the first semiconductors of promise, serving as the basis for the first
transistor, a key enabler of the Information Age, which has fundamentally transformed …