To the observer, it would appear that New York city has a special place in the hearts of
integrated circuit (IC) designers. Manhattan geometries, which mimic the blocks and streets …

3D circuits have the potential to improve performance over traditional 2D circuits by reducing
wirelength and interconnect delay. One major problem with 3D circuits is that their higher …

This paper presents the first multiobjective microarchitectural floorplanning algorithm for
high-performance processors implemented in two-dimensional (2-D) and three-dimensional …

In this paper, we present a high-quality analytical 3-D placement framework. We propose
using a Huber-based local smoothing technique to work with a Helmholtz-based global …

Vertically integrated circuits (3-D ICs) may revitalize Moore's law scaling which has slowed
down in recent years. 3-D stacking is an emerging technology that stacks multiple dies …

In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies
stacked on top of each other. These TSV occupy silicon area and have significantly larger …

As technology scales, interconnects have become a major performance bottleneck and a
major source of power consumption for sub-micro integrated circuit (IC) chips. One …

Three-dimensional (3-D) packaging via system-on-a-package (SOP) has been recently
proposed as an alternative solution to overcome the limitation of system-on-a-chip (SOC) …

The capability of predicting the temperature profile is critically important for timing estimation,
leakage reduction, power estimation, hotspot avoidance and reliability concerns during …

Incorporating thermal vias into 3D ICs is a promising way to reduce circuit temperature by
lowering down the thermal resistances between device layers. In this paper, we integrate …