Stochastic charge trap** in oxides: From random telegraph noise to bias temperature instabilities

T Grasser - Microelectronics Reliability, 2012 - Elsevier
Charge trap** at oxide defects fundamentally affects the reliability of MOS transistors. In
particular, charge trap** has long been made responsible for random telegraph and 1/f …

The negative bias temperature instability in MOS devices: A review

JH Stathis, S Zafar - Microelectronics Reliability, 2006 - Elsevier
Negative bias temperature instability (NBTI), in which interface traps and positive oxide
charge are generated in metal–oxide–silicon (MOS) structures under negative gate bias, in …

The paradigm shift in understanding the bias temperature instability: From reaction–diffusion to switching oxide traps

T Grasser, B Kaczer, W Goes… - … on Electron Devices, 2011 - ieeexplore.ieee.org
One of the most important degradation modes in CMOS technologies, the bias temperature
instability (BTI) has been known since the 1960s. Already in early interpretations, charge …

A comprehensive model of PMOS NBTI degradation

MA Alam, S Mahapatra - Microelectronics Reliability, 2005 - Elsevier
Negative bias temperature instability has become an important reliability concern for ultra-
scaled Silicon IC technology with significant implications for both analog and digital circuit …

A comparative study of different physics-based NBTI models

S Mahapatra, N Goel, S Desai, S Gupta… - IEEE transactions on …, 2013 - ieeexplore.ieee.org
Different physics-based negative bias temperature instability (NBTI) models as proposed in
the literature are reviewed, and the predictive capability of these models is benchmarked …

Analog Circuits and Signal Processing

M Ismail, M Sawan - 2013 - Springer
Today, micro-electronic circuits are undeniably and ubiquitously present in our society.
Transportation vehicles such as cars, trains, buses, and airplanes make abundant use of …

Modeling and minimization of PMOS NBTI effect for robust nanometer design

R Vattikonda, W Wang, Y Cao - Proceedings of the 43rd annual Design …, 2006 - dl.acm.org
Negative bias temperature instability (NBTI) has become the dominant reliability concern for
nanoscale PMOS transistors. In this paper, a predictive model is developed for the …

Compact modeling and simulation of circuit reliability for 65-nm CMOS technology

W Wang, V Reddy, AT Krishnan… - … on Device and …, 2007 - ieeexplore.ieee.org
Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are the leading
reliability concerns for nanoscale transistors. The de facto modeling method to analyze CHC …

A comprehensive model for PMOS NBTI degradation: Recent progress

MA Alam, H Kufluoglu, D Varghese… - Microelectronics …, 2007 - Elsevier
Negative bias temperature instability (NBTI) is a well-known reliability concern for PMOS
transistors. We review the literature to find seven key experimental features of NBTI …

Impact of NBTI on SRAM read stability and design for reliability

SV Kumar, KH Kim… - … Symposium on Quality …, 2006 - ieeexplore.ieee.org
Negative bias temperature instability (NBTI) has the potential to become one of the main
show-stoppers of circuit reliability in nanometer scale devices due to its deleterious effects …