Abstract Persistent Memory (PM) and Hardware Transactional Memory (HTM) are two recent
architectural developments whose joint usage promises to drastically accelerate the …

Transactional Memory was recently integrated in Intel processors under the name TSX. We
show that its performance can be significantly affected by the configuration of its interplay …

Processing-In-Memory (PIM) is a novel approach that augments existing DRAM memory
chips with lightweight logic. By allowing to offload computations to the PIM system, this …

The introduction of hardware transactional memory (HTM) into commercial processors
opens a door for designing and implementing scalable synchronization mechanisms. One …

The Transactional Memory (TM) paradigm promises to greatly simplify the development of
concurrent applications. This led, over the years, to the creation of a plethora of TM …

The ubiquity of multicore processors has led programmers to write parallel and concurrent
applications to take advantage of the underlying hardware and speed up their executions. In …

Hardware Lock Elision (HLE) represents a promising technique to enhance parallelism of
concurrent applications relying on conventional, lock-based synchronization. The idea at the …

It is well known that the ability to timestamp events, to keep track of the order in which they
occur, or to make sure they are processed in a way that is meaningful to the application, is of …

ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs Page 1 ConDRust:
Scalable Deterministic Concurrency from Verifiable Rust Programs Felix Suchert TU Dresden …

This paper presents Occualizer, a mechanical source code transformation for adding
scalable optimistic synchronization to a sequential search tree implementation. Occualizer …