Low-power tunnel field effect transistors using mixed As and Sb based heterostructures
Reducing supply voltage is a promising way to address the power dissipation in nano-
electronic circuits. However, the fundamental lower limit of subthreshold slope (SS) within …
electronic circuits. However, the fundamental lower limit of subthreshold slope (SS) within …
Achievement of extremely small subthreshold swing in Vertical Source-All-Around-TFET with suppressed ambipolar conduction
In this manuscript, we come up with a new line-tunneling-based channel-engineered
GaAsSb/GaSb heterojunction Source-All-Around Vertical Nanowire TFET (SAA-NW-VTFET) …
GaAsSb/GaSb heterojunction Source-All-Around Vertical Nanowire TFET (SAA-NW-VTFET) …
Design and Simulation of Si and Ge Double-Gate Tunnel Field-Effect Transistors with High-κ Al2O3 Gate Dielectric: DC and RF Analysis
Steep subthreshold slope and high current on–off ratio are among the major challenges of
tunnel field-effect transistors (TFETs) for low-power complementary metal-oxide …
tunnel field-effect transistors (TFETs) for low-power complementary metal-oxide …
Impact of Temperature and Fixed Oxide Charge Variation on Performance of Gate-on-Source/Channel SOI TFET and Its Circuit Application
In this paper, the effects of temperature and fixed oxide charge variability on gate-on-
source/channel SOI TFET are investigated. At first, a general comparison is drawn among a …
source/channel SOI TFET are investigated. At first, a general comparison is drawn among a …
[CITATION][C] Ultra-low Power Circuits and Architectures for Neuromorphic Computing Accelerators with Emerging TFETs and ReRAMs
J Lin - 2020