Reliable on-chip systems in the nano-era: Lessons learnt and future trends
Reliability concerns due to technology scaling have been a major focus of researchers and
designers for several technology nodes. Therefore, many new techniques for enhancing and …
designers for several technology nodes. Therefore, many new techniques for enhancing and …
An efficient method to identify critical gates under circuit aging
W Wang, Z Wei, S Yang, Y Cao - 2007 IEEE/ACM International …, 2007 - ieeexplore.ieee.org
Negative bias temperature instability (NBTI) is the leading factor of circuit performance
degradation. Due to its complex dependence on operating conditions, especially signal …
degradation. Due to its complex dependence on operating conditions, especially signal …
Reliability-aware design to suppress aging
Due to aging, circuit reliability has become extraordinary challenging. Reliability-aware
circuit design flows do virtually not exist and even research is in its infancy. In this paper, we …
circuit design flows do virtually not exist and even research is in its infancy. In this paper, we …
Optimized circuit failure prediction for aging: Practicality and promise
M Agarwal, V Balakrishnan, A Bhuyan… - 2008 IEEE …, 2008 - ieeexplore.ieee.org
Circuit failure prediction is used to predict occurrences of circuit failures, during system
operation, before errors appear in system data and states. This technique is applicable for …
operation, before errors appear in system data and states. This technique is applicable for …
An on-chip NBTI sensor for measuring PMOS threshold voltage degradation
Negative Bias Temperature Instability (NBTI) is one of the most critical device reliability
issues facing scaled CMOS technology. In order to better understand the characteristics of …
issues facing scaled CMOS technology. In order to better understand the characteristics of …
Statistical reliability analysis under process variation and aging effects
Circuit reliability is affected by various fabrication-time and run-time effects. Fabrication-
induced process variation has significant impact on circuit performance and reliability …
induced process variation has significant impact on circuit performance and reliability …
Joint logic restructuring and pin reordering against NBTI-induced performance degradation
KC Wu, D Marculescu - 2009 Design, Automation & Test in …, 2009 - ieeexplore.ieee.org
Negative Bias Temperature Instability (NBTI), a PMOS aging phenomenon causing
significant loss on circuit performance and lifetime, has become a critical challenge for …
significant loss on circuit performance and lifetime, has become a critical challenge for …
Reliability vs. security: Challenges and opportunities for develo** reliable and secure integrated circuits
As technology further scales, devices offer better performance with faster speed and lower
power albeit at the cost of reliability. Advanced technology nodes introduce higher variations …
power albeit at the cost of reliability. Advanced technology nodes introduce higher variations …
Toward increasing FPGA lifetime
S Srinivasan, R Krishnan, P Mangalagiri… - … on Dependable and …, 2008 - ieeexplore.ieee.org
Field-Programmable Gate Arrays (FPGAs) have been aggressively moving to lower gate
length technologies. Such a scaling of technology has an adverse impact on the reliability of …
length technologies. Such a scaling of technology has an adverse impact on the reliability of …
Learning image similarity from flickr groups using stochastic intersection kernel machines
Measuring image similarity is a central topic in computer vision. In this paper, we learn
similarity from Flickr groups and use it to organize photos. Two images are similar if they are …
similarity from Flickr groups and use it to organize photos. Two images are similar if they are …