Recent advances and trends in Cu–Cu hybrid bonding
In this study, the recent advances and trends in Cu–Cu hybrid bonding will be investigated.
Emphasis is placed on the definition, kinds, advantages and disadvantages, challenges …
Emphasis is placed on the definition, kinds, advantages and disadvantages, challenges …
Recent advances and new trends in flip chip technology
Recent advances in flip chip technology such as wafer bum**, package substrate, flip chip
assembly, and underfill will be presented in this study. Emphasis is placed on the latest …
assembly, and underfill will be presented in this study. Emphasis is placed on the latest …
Overview and outlook of through‐silicon via (TSV) and 3D integrations
Purpose–The purpose of this paper is to focus on through‐silicon via (TSV), with a new
concept that every chip or interposer could have two surfaces with circuits. Emphasis is …
concept that every chip or interposer could have two surfaces with circuits. Emphasis is …
Evolution, challenge, and outlook of TSV, 3D IC integration and 3D silicon integration
3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration. They
are different and in general the TSV (through-silicon via) separates 3D IC packaging from …
are different and in general the TSV (through-silicon via) separates 3D IC packaging from …
Polymer integration for packaging of implantable sensors
Abstract Inexpensive, easy-to-process, light-weight polymer-based materials that are
biocompatible, mechanically flexible, and optically transparent have emerged as …
biocompatible, mechanically flexible, and optically transparent have emerged as …
Nanocrystalline copper for direct copper-to-copper bonding with improved cross-interface formation at low thermal budget
Direct copper-to-copper (Cu-Cu) bonding is a promising technology for advanced electronic
packaging. Nanocrystalline (NC) Cu receives increasing attention due to its unique ability to …
packaging. Nanocrystalline (NC) Cu receives increasing attention due to its unique ability to …
TSV manufacturing yield and hidden costs for 3D IC integration
3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration. They
are different and in general, the TSV (through-silicon-via) separates the 3D IC packaging …
are different and in general, the TSV (through-silicon-via) separates the 3D IC packaging …
Materials, processing and reliability of low temperature bonding in 3D chip stacking
Due to the advantages of small form factor, high performance, low power consumption, and
high density integration, three-dimensional integrated circuits (3D ICs) have been generally …
high density integration, three-dimensional integrated circuits (3D ICs) have been generally …
Plasma-activated silicon–glass high-strength multistep bonding for low-temperature vacuum packaging
M Yu, L Zhao, Y Wang, Y **a, Y Ma, Y Wang… - Chemical Engineering …, 2023 - Elsevier
Si-glass bonding is one of the most crucial vacuum packaging methods in semiconductor
devices; however, high temperatures (> 300° C) are required to achieve a high bonding …
devices; however, high temperatures (> 300° C) are required to achieve a high bonding …
Impact of crystalline orientation on Cu–Cu solid-state bonding behavior by molecular dynamics simulations
High-density electronics are hindered by the constraints of Sn-based solder joints,
necessitating the exploration of Cu–Cu solid-state bonding. However, current bonding …
necessitating the exploration of Cu–Cu solid-state bonding. However, current bonding …