More flops or more precision? Accuracy parameterizable linear equation solvers for model predictive control

A Roldao-Lopes, A Shahzad… - 2009 17th IEEE …, 2009 - ieeexplore.ieee.org
In this paper we exploit FPGA flexibility in the context of accelerating the solution of many
small systems of linear equations, a problem central to model predictive control (MPC). The …

Experimental characterization of the 192 channel Clear-PEM frontend ASIC coupled to a multi-pixel APD readout of LYSO: Ce crystals

E Albuquerque, V Bexiga, R Bugalho, B Carriço… - Nuclear Instruments and …, 2009 - Elsevier
In the framework of the Clear-PEM project for the construction of a high-resolution scanner
for breast cancer imaging, a very compact and dense frontend electronics system has been …

Aging monitoring with local sensors in FPGA-based designs

C Leong, J Semião, IC Teixeira… - … Conference on Field …, 2013 - ieeexplore.ieee.org
In nanoscale FPGAs, variability and aging significantly limit performance. In this paper, a
novel aging monitoring methodology for FPGA-based designs to mitigate those effects is …

Multi-channel data acquisition and wireless communication FPGA-based system, to real-time remote monitoring

JG Velásquez-Aguilar… - 2017 International …, 2017 - ieeexplore.ieee.org
In this paper, a low cost, stand-alone and configurable data acquisition system with wireless
communication to remote host is presented. The system allows recording up to eight …

Built-in clock domain crossing (CDC) test and diagnosis in GALS systems

C Leong, P Machado, V Bexiga… - … IEEE Symposium on …, 2010 - ieeexplore.ieee.org
The purpose of this paper is to present a novel built-in Clock Domain Crossing (CDC) test
and diagnosis methodology for Globally Asynchronous, Locally Synchronous (GALS) …

Fast radiation monitoring in FPGA-based designs

C Leong, J Semião, MB Santos… - 2015 Conference on …, 2015 - ieeexplore.ieee.org
In nanoscale FPGAs, variability, aging and radiation effects significantly limit system
performance and reliability, which is a relevant problem in safety-critical applications …

A column-based processing array for high-speed digital image processing

T Morris, E Fletcher, C Afghahi, S Issa… - … Research in VLSI, 1999 - ieeexplore.ieee.org
We present a novel architecture for column-based image processing within an integrated
CMOS sensor chip. The system includes a two-dimensional array of active pixel sensors, a …

Performance failure prediction using built-in delay sensors in FPGAs

V Bexiga, C Leong, J Semiao… - … Conference on Field …, 2011 - ieeexplore.ieee.org
The objective of this paper is to propose a performance failure prediction methodology for
FPGA-based designs, based on the use of a novel built-in programmable delay sensor …

High-speed and portable data acquisition system based on FPGA

XQ Cao, J Zhang, W Yao, M Ju - 2012 Fifth International …, 2012 - ieeexplore.ieee.org
Based on the high speed and accuracy of ADC and the advantages of USB, this paper is to
design a high-speed and portable data acquisition system based on FPGA and high speed …

Performance simulation studies of the Clear-PEM DAQ/Trigger system

P Bento, F Goncalves, C Leong, P Lousa… - IEEE transactions on …, 2006 - ieeexplore.ieee.org
The Clear-PEM detector is a positron emission mammography scanner based on a high-
granularity avalanche photodiode readout with 12 288 channels. The front-end sub-system …