The recently developed High Efficiency Video Coding (HEVC) international video
compression standard uses adaptive deblocking filter for reducing blocking artifacts …

Dynamic partial reconfiguration technique can be used to modify regions of an FPGA as
large as the whole reconfigurable fabric or as small as individual logic elements. However …

FPGAs are well-suited for applications that need to adjust the composition of computational
structures over the lifetime of the application. While the underlying hardware framework for …

Two research projects are proposed that rely on Tools for open Reconfigurable Computing
(TORC) and the openness of the **linx tool chain. The first project, the Embedded FPGA …

Radar is one of the domains where adaptability is paramount. Depending on the current
system state, the radar algorithms must be adapted. However, most systems include static …

Design Methodologies and Architectures for Just-in-Time Hardware Composition of Multi
Grain Reconfigurable Accelerators | Archivo Digital UPM Archivo Digital UPM En esta …

This dissertation proposes an alternative FPGA design compilation ow to reduce the back-
end time required to implement an FPGA design to below the level at which the user's at …

Scalable Video Coding (SVC) is an extension of H. 264/AVC standard proposed by Joint
Video Team (JVT) to provide flexibility and adaptability on video transmission. For this …

Joint collaborative team on video coding (JCT-VC) recently developed a new international
video compression standard called High Efficiency Video Coding (HEVC). HEVC has 37 …

Les systèmes radar embarqués sont limités en ressources de calcul. Dans le même temps,
ces systèmes doivent utiliser des algorithmes toujours plus complexes et demandant de …