Field Programmable Gate Arrays (FPGAs) are currently recognized as the most suitable
platform for the implementation of complex digital systems targeting an increasing number of …

Network on chip (NoC) has emerged as the design paradigm for scalable System on Chip
with harsh bandwidth requirements. However, current NoCs remain not flexible enough to …

Abstract Systems and methods for providing a Network-On-Chip (NoC) structure on an
integrated circuit for high-speed data passing. In some aspects, the NoC structure includes …

One major advantage of reconfigurable computing systems is their ability to reconfigure
hardware at runtime. In this paper, we study the feasibility of achieving energy efficiency in …

In this paper, we present a new network-on-chip (NoC) that handles accurate localizations of
the faulty parts of the NoC. The proposed NoC is based on new error detection mechanisms …

In multi-core ASICs, processors and other compute engines need to communicate with
memory blocks and other cores with latency as close as possible to the ideal of a direct …

This paper presents an FPGA emulation-based fast network on chip (NoC) prototy**
framework, called dynamic reconfigurable NoC (DRNoC) emulation platform. The main …

Abstract Network-on-Chip (NoC) has emerged as a very promising paradigm for designing
scalable communication architecture for Systems-on-Chips (SoCs). However, NoCs …

We propose that networks on chip (NOC) are hardwired in field-programmable gate arrays
(FPGA). Although some area of the FPGA then has a fixed function, this loss of flexibility is …

Examples described herein provide for an electronic circuit, such as a System-on-Chip
(SOC), having a Network-on-Chip (NoC). The NoC is configurable and has capabilities to be …