Conduction mechanisms in MOS gate dielectric films

BL Yang, PT Lai, H Wong - Microelectronics Reliability, 2004 - Elsevier
This paper reviews the conduction mechanisms in the gate dielectric films of MOSFETs for
VLSI and ULSI technologies. They include Fowler–Nordheim tunneling, internal Schottky (or …

Multistate, ultrathin, back-end-of-line-compatible AlScN ferroelectric diodes

KH Kim, Z Han, Y Zhang, P Musavigharavi, J Zheng… - ACS …, 2024 - ACS Publications
The growth in data generation necessitates efficient data processing technologies to
address the von Neumann bottleneck in conventional computer architecture. Memory-driven …

Trap-assisted tunneling in high permittivity gate dielectric stacks

M Houssa, M Tuominen, M Naili, V Afanas'ev… - Journal of Applied …, 2000 - pubs.aip.org
The electrical characteristics of SiOx/ZrO2 and SiOx/Ta2O5 gate dielectric stacks are
investigated. The current–density JG in these dielectric stacks is shown to be strongly …

Charge trap** instabilities in amorphous silicon‐silicon nitride thin‐film transistors

MJ Powell - Applied Physics Letters, 1983 - pubs.aip.org
The most important instability mechanism in amorphous silicon-silicon nitride thin-film
transistors is charge trap** in the silicon nitride layer, which leads to a threshold voltage …

Current transport mechanism in trapped oxides: A generalized trap-assisted tunneling model

MP Houng, YH Wang, WJ Chang - Journal of applied physics, 1999 - pubs.aip.org
A generalized trap-assisted tunneling (GTAT) model is proposed in this work, where an
effective tunneling barrier of trapezoidal shape is considered, instead of the triangular …

Superior resistive switching memory and biological synapse properties based on a simple TiN/SiO 2/p-Si tunneling junction structure

X Yan, Z Zhou, B Ding, J Zhao, Y Zhang - Journal of Materials …, 2017 - pubs.rsc.org
In this study, a simple TiN/SiO2/p-Si tunneling junction structure was fabricated via thermal
oxidation growth on a Si substrate annealed at 600° C. After electroforming, the number of …

Charge retention of scaled SONOS nonvolatile memory devices at elevated temperatures

MH White - Solid-State Electronics, 2000 - Elsevier
The charge retention characteristics in scaled SONOS nonvolatile memory devices with an
effective gate oxide thickness of 94 Å and a tunnel oxide of 15 Å are investigated in a …

A low voltage SONOS nonvolatile semiconductor memory technology

MH White, Y Yang, A Purwar… - IEEE Transactions on …, 1997 - ieeexplore.ieee.org
The triple-dielectric polysilicon-blocking oxide-silicon nitride-tunnel oxide-silicon (SONOS)
structure is an attractive candidate for high density E/sup 2/PROMs suitable for …

An analytical retention model for SONOS nonvolatile memory devices in the excess electron state

Y Wang, MH White - Solid-State Electronics, 2005 - Elsevier
We present an analytical retention model for scaled SONOS devices in the excess electron
state. In this model, trap-to-band tunneling and thermal excitation discharge mechanisms …

Mechanism of the reverse gate leakage in AlGaN/GaN high electron mobility transistors

S Karmalkar, DM Sathaiya, MS Shur - Applied physics letters, 2003 - pubs.aip.org
The off-state gate current in AlGaN/GaN high electron mobility transistors is shown to arise
from two parallel gate to substrate tunneling paths: a direct path, and a path via deep traps …