[書籍][B] Memory systems: cache, DRAM, disk

B Jacob, D Wang, S Ng - 2010 - books.google.com
Is your memory hierarchy stop** your microprocessor from performing at the high level it
should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …

[書籍][B] The garbage collection handbook: the art of automatic memory management

R Jones, A Hosking, E Moss - 2023 - books.google.com
Published in 1996, Richard Jones's Garbage Collection was a milestone in the area of
automatic memory management. Its widely acclaimed successor, The Garbage Collection …

DieHard: Probabilistic memory safety for unsafe languages

ED Berger, BG Zorn - Acm sigplan notices, 2006 - dl.acm.org
Applications written in unsafe languages like C and C++ are vulnerable to memory errors
such as buffer overflows, dangling pointers, and reads of uninitialized data. Such errors can …

[PDF][PDF] DBMSs on a modern processor: Where does time go?

A Ailamaki, DJ DeWitt, MD Hill… - VLDB'99, Proceedings of …, 1999 - infoscience.epfl.ch
Recent high-performance processors employ sophisticated techniques to overlap and
simultaneously execute multiple computation and memory operations. Intuitively, these …

Speedup graph processing by graph ordering

H Wei, JX Yu, C Lu, X Lin - … of the 2016 International Conference on …, 2016 - dl.acm.org
The CPU cache performance is one of the key issues to efficiency in database systems. It is
reported that cache miss latency takes a half of the execution time in database systems. To …

[書籍][B] Multiprocessor systems-on-chips

A Jerraya, W Wolf - 2004 - books.google.com
Modern system-on-chip (SoC) design shows a clear trend toward integration of multiple
processor cores on a single chip. Designing a multiprocessor system-on-chip (MPSOC) …

Linearizing irregular memory accesses for improved correlated prefetching

A Jain, C Lin - Proceedings of the 46th Annual IEEE/ACM …, 2013 - dl.acm.org
This paper introduces the Irregular Stream Buffer (ISB), a prefetcher that targets irregular
sequences of temporally correlated memory references. The key idea is to use an extra level …

Framework for instruction-level tracing and analysis of program executions

S Bhansali, WK Chen, S De Jong, A Edwards… - Proceedings of the 2nd …, 2006 - dl.acm.org
Program execution traces provide the most intimate details of a program's dynamic behavior.
They can be used for program optimization, failure diagnosis, collecting software metrics like …

Cache-conscious structure definition

TM Chilimbi, B Davidson, JR Larus - Proceedings of the ACM SIGPLAN …, 1999 - dl.acm.org
A program's cache performance can be improved by changing the organization and layout
of its data---even complex, pointer-based data structures. Previous techniques improved the …

The gSOAP toolkit for web services and peer-to-peer computing networks

RA Van Engelen, KA Gallivan - 2nd IEEE/ACM International …, 2002 - ieeexplore.ieee.org
This paper presents the gSOAP stub and skeleton compiler. The compiler provides a unique
SOAP-to-C/C++ language binding for deploying C/C++ applications in SOAP Web Services …