An energy efficient all-digital time-domain compute-in-memory macro optimized for binary neural networks
The deployment of neural networks on edge devices has created a growing need for energy-
efficient computing. In this paper, we propose an all-digital standard cell-based time-domain …
efficient computing. In this paper, we propose an all-digital standard cell-based time-domain …
Architecture-circuit-technology co-optimization for resistive random access memory-based computation-in-memory chips
Abstract Computation-in-memory (CIM) chips offer an energy-efficient approach to artificial
intelligence computing workloads. Resistive random-access memory (RRAM)-based CIM …
intelligence computing workloads. Resistive random-access memory (RRAM)-based CIM …
DS-CIM: A 40nm Asynchronous Dual-Spike Driven, MRAM Compute-In-Memory Macro for Spiking Neural Network
Compute-in-memory (CIM) based on emerging nonvolatile memory (eNVM) is an effective
way to deploy neural networks to low-power edge devices for both storage and computation …
way to deploy neural networks to low-power edge devices for both storage and computation …
SSM-CIM: An Efficient CIM Macro Featuring Single-Step Multi-bit MAC Computation for CNN Edge Inference
H Zhang, S He, X Lu, X Guo, S Wang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Compute-in-memory (CIM) is a promising approach to solving the memory-wall problem
existing in traditional computing architectures. In this paper, we introduce SSM-CIM, a …
existing in traditional computing architectures. In this paper, we introduce SSM-CIM, a …
A 578-TOPS/W RRAM-based binary convolutional neural network macro for tiny AI edge devices
L Wang, Y Zhang, P Wang, J Yang… - … Transactions on Very …, 2024 - ieeexplore.ieee.org
The novel nonvolatile computing-in-memory (nvCIM) technology enables data to be stored
and processed in situ, providing a feasible solution for the widespread deployment of …
and processed in situ, providing a feasible solution for the widespread deployment of …
Spin device-based image edge detection architecture for neuromorphic computing
Artificial intelligence and deep learning today are utilized for several applications namely
image processing, smart surveillance, edge computing, and so on. The hardware …
image processing, smart surveillance, edge computing, and so on. The hardware …
[HTML][HTML] Design of a low-power Digital-to-Pulse Converter (DPC) for in-memory-computing applications
Data converters such as analog-to-digital converters (ADCs), digital-to-analog converters
(DACs), digital-to-time converters (DTCs), time-to-digital converters (TDCs), among others …
(DACs), digital-to-time converters (DTCs), time-to-digital converters (TDCs), among others …
GemIMC: A Configurable HW Architecture for Technology Agnostic IMC based NN Inference
E Taly, R Guizzetti, P Urard… - 2024 IFIP/IEEE 32nd …, 2024 - ieeexplore.ieee.org
This paper presents GemIMC, a High Level Synthesis (HLS) based configurable digital unit
architecture for accelerating Neural Networks (NN) at the edge using In Memory Computing …
architecture for accelerating Neural Networks (NN) at the edge using In Memory Computing …
Straightforward data transfer in a blockwise dataflow for an analog RRAM-based CIM system
Analog resistive random-access memory (RRAM)-based computation-in-memory (CIM)
technology is promising for constructing artificial intelligence (AI) with high energy efficiency …
technology is promising for constructing artificial intelligence (AI) with high energy efficiency …
Heterogeneous 2D Memristor Array and Silicon Selector for Compute-in-Memory Hardware in Convolution Neural Networks
Memristor crossbar arrays (CBAs) based on two-dimensional (2D) materials have emerged
as a potential solution to overcome the limitations of energy consumption and latency …
as a potential solution to overcome the limitations of energy consumption and latency …