On noise-induced transient bit flips in subthreshold SRAM
We propose a rigorous SPICE simulation framework, compatible with industrial process
design kits, to observe transient bit flips in CMOS SRAM due to the intrinsic transistor noise …
design kits, to observe transient bit flips in CMOS SRAM due to the intrinsic transistor noise …
Pragmatic evaluation of process corners in ULP subthreshold circuits with quantum confinement effects in junctionless nanowire transistor
This paper proposes a simplified analytical approach to analyze the influence of process
variations including quantum confinement effect (QCE) on the functionality of ultralow power …
variations including quantum confinement effect (QCE) on the functionality of ultralow power …
Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells
Stability of ultra-low-voltage SRAM bitcells in re-tention mode is threatened by two types of
uncertainty: process variability and intrinsic noise. While variability dominates the failure …
uncertainty: process variability and intrinsic noise. While variability dominates the failure …
Yield Maximization of Flip-Flop Circuits Based on Deep Neural Network and Polyhedral Estimation of Nonlinear Constraints
In this paper, we propose a method based on deep neural networks for the statistical design
of flip-flops, taking into account nonlinear performance constraints. Flip-flop design and …
of flip-flops, taking into account nonlinear performance constraints. Flip-flop design and …
Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations
Stability of ultra-low-voltage SRAM bitcells in retention mode is threatened by two types of
uncertainty: process variability and intrinsic noise. While variability dominates the failure …
uncertainty: process variability and intrinsic noise. While variability dominates the failure …
Stochastic nonlinear dynamical modelling of SRAM bitcells in retention mode
SRAM bitcells in retention mode behave as autonomous stochastic nonlinear dynamical
systems. From observation of variability-aware transient noise simulations, we provide an …
systems. From observation of variability-aware transient noise simulations, we provide an …
Efficient Memory Circuits Yield Analysis and Optimization Framework via Meta-Learning
Z Wang, L Pang, X Shi, L Shi - IEEE Transactions on Circuits …, 2024 - ieeexplore.ieee.org
Yield optimization is a computationally intensive process that requires repeated yield
estimation. In this brief, we propose a yield-driven optimization process based on meta …
estimation. In this brief, we propose a yield-driven optimization process based on meta …