An output-capacitor-free synthesizable digital LDO using CMP-triggered oscillator and droop detector

J Oh, YH Hwang, JE Park, M Seok… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article presents a synthesizable digital low-dropout regulator (DLDO) that precludes the
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …

Digital low-dropout regulator with voltage-controlled oscillator based control

JG Kang, J Park, MG Jeong… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A digital low-dropout (DLDO) regulator is described which is controlled by voltage-controlled
oscillator (VCO) based feedback loop. There are two VCOs in the control loop whose …

An output-capacitorless analog LDO featuring frequency compensation of four-stage amplifier

M Kim, S Cho - IEEE Transactions on Circuits and Systems I …, 2022 - ieeexplore.ieee.org
In this paper, we propose an output-capacitorless analog low-dropout voltage regulator
(ALDO) featuring frequency compensation of a four-stage amplifier consisting of a three …

Architectural advancement of digital low-dropout regulators

MA Akram, IC Hwang, S Ha - IEEE access, 2020 - ieeexplore.ieee.org
Digital Low-dropout (DLDO) regulators have been widely utilised for highly-efficient fine-
grained power delivery and management in system-on-chips (SoCs) due to their process …

A 310-nA quiescent current 3-fs-FoM fully integrated capacitorless time-domain LDO with event-driven charge pump and feedforward transient enhancement

J Zhao, Y Gao, TT Zhang, H Son… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
In this article, a fully integrated capacitorless low-dropout regulator (LDO) is presented for
Internet-of-Things (IoT) edge sensor application. To achieve sub-1-V operation and fast …

Review, survey, and benchmark of recent digital LDO voltage regulators

Z Wang, SJ Kim, K Bowman… - 2022 IEEE Custom …, 2022 - ieeexplore.ieee.org
This paper presents a review of the recent digital low-dropout voltage regulators (DLDOs).
We have reviewed them in five aspects: control laws, triggering methods, power-FET circuit …

29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET …

DH Jung, TH Kong, JH Yang, SH Kim… - … Solid-State Circuits …, 2021 - ieeexplore.ieee.org
Although the number of cores is increasing continuously in modern microprocessors for
applications such as HPC and AI, the available power is strictly limited by the thermal power …

An all-standard-cell-based synthesizable SAR ADC with nonlinearity-compensated RDAC

Z Xu, N Ojima, S Li, T Iizuka - IEEE Transactions on Very Large …, 2021 - ieeexplore.ieee.org
We propose an all-standard-cell-based synthesizable successive-approximation-register
analog-to-digital converter (SAR ADC) which is automatically placed and routed (P&R) …

A residue-current-locked hybrid low-dropout regulator supporting ultralow dropout of sub-50 mV with fast settling time below 10 ns

YH Hwang, J Oh, WS Choi, DK Jeong… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
This article proposes a fully integrated hybrid low-dropout regulator (HLDO) that features an
ultralow dropout and a highly improved transient response. This HLDO incorporates a …

A feedforward controlled digital low-dropout regulator with weight redistribution algorithm and body voltage control for improving line regulation with 99.99% current …

BH Chen, TY Wu, KL Zheng, KH Chen… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
In this article, a digital LDO with a feedforward controller and weight redistribution algorithm
(WRA) for line regulation improvement is proposed. The proposed digital low dropout …