Hardware security exploiting post-CMOS devices: fundamental device characteristics, state-of-the-art countermeasures, challenges and roadmap

A Japa, MK Majumder, SK Sahoo… - IEEE Circuits and …, 2021 - ieeexplore.ieee.org
Emerging nanoelectronic semiconductor devices have been quite promising in enhancing
hardware-oriented security and trust. However, implementing hardware security primitives …

Trends in hardware security: From basics to ASICs

M Alioto - IEEE Solid-State Circuits Magazine, 2019 - ieeexplore.ieee.org
This article presents an excerpt of the tutorial on hardware security delivered at the 2019
IEEE International Solid-State Circuits Conference and an introduction to a performance …

An all-digital unified physically unclonable function and true random number generator featuring self-calibrating hierarchical Von Neumann extraction in 14-nm tri-gate …

SK Satpathy, SK Mathew, R Kumar… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
This paper describes a unified static/dynamic entropy generator based on a 512-b common
entropy source (ES) array fabricated in 14-nm tri-gate CMOS with reconfigurable and …

Fully synthesizable PUF featuring hysteresis and temperature compensation for 3.2% native BER and 1.02 fJ/b in 40 nm

S Taneja, AB Alvarez, M Alioto - IEEE Journal of Solid-State …, 2018 - ieeexplore.ieee.org
This paper presents a physically unclonable function (PUF) that can be designed with an
automated digital design flow with a standard-cell approach. Compared to conventional …

A physically unclonable function using soft oxide breakdown featuring 0% native BER and 51.8 fJ/bit in 40-nm CMOS

KH Chuang, E Bury, R Degraeve… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
This paper presents a physically unclonable function (PUF) based on the randomness of soft
gate oxide breakdown (BD) locations in MOSFETs, namely, soft-BD PUF. The proposed PUF …

A 373-F2 0.21%-Native-BER EE SRAM Physically Unclonable Function With 2-D Power-Gated Bit Cells and Bias-Based Dark-Bit Detection

K Liu, Y Min, X Yang, H Sun… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
This article presents a highly stable SRAM-based physically unclonable function (PUF)
using enhancement-enhancement (EE)-structure bit cells for native stability improvement …

Exploiting the DD-Cell as an ultra-compact entropy source for an FPGA-based re-configurable PUF-TRNG architecture

R Della Sala, G Scotti - IEEE Access, 2023 - ieeexplore.ieee.org
Physical Unclonable Functions (PUFs) and True Random Number Generators (TRNGs) are
both needed in the Privacy Preserving Mutual Autentication (PPMA) protocol, often used in …

A 0.5-V hybrid SRAM physically unclonable function using hot carrier injection burn-in for stability reinforcement

K Liu, X Chen, H Pu… - IEEE Journal of Solid-State …, 2020 - ieeexplore.ieee.org
This article introduces an SRAM-based physically unclonable function (PUF) that employs
hybrid-mode operations in the enhancement-enhancement (EE) SRAM mode and CMOS …

S2RAM PUF: An ultra-low power subthreshold SRAM PUF with zero bit error rate

L Ni, J Zhang - Proceedings of the 61st ACM/IEEE Design Automation …, 2024 - dl.acm.org
The reliability of physical unclonable function (PUF) has become the biggest challenge for
key generation. Existing reliability improvement technologies incur high hardware overhead …

An SRAM-based PUF with a capacitive digital preselection for a 1E-9 key error probability

Y Shifman, A Miller, O Keren… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
In this paper, a novel architecture of an SRAM-based Physical Unclonable Function (PUF)
whose unstable cells are identified and masked by a “capacitive tilt” preselection test is …