A fast and power-efficient hardware architecture for non-maximum suppression

M Shi, P Ouyang, S Yin, L Liu… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Non-maximum suppression (NMS) is an indispensable post-processing step in face
detection. The vast majority of face detection methods need NMS to merge the candidate …

[HTML][HTML] A high performance dual stage face detection algorithm implementation using FPGA Chip and DSP processor

MV Rao, PR Kumar, T Balaji - Journal of Information Systems and …, 2022 - jist.ir
A dual stage system architecture for face detection based on skin tone detection and Viola
and Jones face detection structure is presented in this paper. The proposed architecture …