RT-ROS: A real-time ROS architecture on multi-core processors

H Wei, Z Shao, Z Huang, R Chen, Y Guan, J Tan… - Future Generation …, 2016 - Elsevier
ROS, an open-source robot operating system, is widely used and rapidly developed in the
robotics community. However, running on Linux, ROS does not provide real-time …

Exploiting asymmetric errors for LDPC decoding optimization on 3D NAND flash memory

Q Li, L Shi, Y Cui, CJ Xue - IEEE Transactions on Computers, 2019 - ieeexplore.ieee.org
By stacking layers vertically, the adoption of 3D NAND has significantly increased the
capacity for storage systems. The complex structure of 3D NAND introduces more errors …

Improving LDPC performance via asymmetric sensing level placement on flash memory

Q Li, L Shi, CJ Xue, Q Zhuge… - 2017 22nd Asia and …, 2017 - ieeexplore.ieee.org
Flash memory development through technology scaling and bit density has significant
impact on the reliability of flash cells. Hence strong error correction code (ECC) schemes are …

Retention trimming for lifetime improvement of flash memory storage systems

L Shi, K Wu, M Zhao, CJ Xue, D Liu… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
NAND flash memory has been widely deployed in embedded systems, personal computers,
and data centers. While recent technology scaling and density improvement have reduced …

Heating dispersal for self-healing NAND flash memory

R Chen, Y Wang, D Liu, Z Shao… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Substantially reduced lifetimes are becoming a critical issue in NAND flash memory with the
advent of multi-level cell and triple-level cell flash memory. Researchers discovered that …

LDPC Level Prediction Toward Read Performance of High-Density Flash Memories

Y Du, Y Gao, S Huang, Q Li - IEEE Transactions on Computer …, 2023 - ieeexplore.ieee.org
High-density NAND flash memories have been prevailing in storage systems to achieve
large capacities for explosive data. However, they suffer from more severe reliability …

Data-pattern-aware error prevention technique to improve system reliability

J Guo, D Wang, Z Shao, Y Chen - IEEE Transactions on Very …, 2017 - ieeexplore.ieee.org
Program disturb, read disturb, and retention time noise are identified as three major
contributors to multilevel cell (MLC) NAND flash memory bit errors. With program/erase …

A source and channel coding approach for improving flash memory endurance

J Freudenberger, M Rajab… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
The introduction of multiple-level cell (MLC) and triple-level cell (TLC) technologies reduced
the reliability of flash memories significantly compared with single-level cell flash. With MLC …

Storage Reliability

J Shu - Data Storage Architectures and Technologies, 2024 - Springer
The rapid development of information technology has put data at the heart of modern
production, and data is now experiencing a period of tremendous growth. In 2019, the …

[图书][B] Channel and source coding for non-volatile flash memories

M Rajab - 2020 - Springer
Nowadays, flash memory and especially NAND flash memory are very important storage
medium in industrial application. NAND flash memory provides high-density, low-latency …