RT-ROS: A real-time ROS architecture on multi-core processors
ROS, an open-source robot operating system, is widely used and rapidly developed in the
robotics community. However, running on Linux, ROS does not provide real-time …
robotics community. However, running on Linux, ROS does not provide real-time …
Exploiting asymmetric errors for LDPC decoding optimization on 3D NAND flash memory
By stacking layers vertically, the adoption of 3D NAND has significantly increased the
capacity for storage systems. The complex structure of 3D NAND introduces more errors …
capacity for storage systems. The complex structure of 3D NAND introduces more errors …
Improving LDPC performance via asymmetric sensing level placement on flash memory
Flash memory development through technology scaling and bit density has significant
impact on the reliability of flash cells. Hence strong error correction code (ECC) schemes are …
impact on the reliability of flash cells. Hence strong error correction code (ECC) schemes are …
Retention trimming for lifetime improvement of flash memory storage systems
NAND flash memory has been widely deployed in embedded systems, personal computers,
and data centers. While recent technology scaling and density improvement have reduced …
and data centers. While recent technology scaling and density improvement have reduced …
Heating dispersal for self-healing NAND flash memory
Substantially reduced lifetimes are becoming a critical issue in NAND flash memory with the
advent of multi-level cell and triple-level cell flash memory. Researchers discovered that …
advent of multi-level cell and triple-level cell flash memory. Researchers discovered that …
LDPC Level Prediction Toward Read Performance of High-Density Flash Memories
High-density NAND flash memories have been prevailing in storage systems to achieve
large capacities for explosive data. However, they suffer from more severe reliability …
large capacities for explosive data. However, they suffer from more severe reliability …
Data-pattern-aware error prevention technique to improve system reliability
Program disturb, read disturb, and retention time noise are identified as three major
contributors to multilevel cell (MLC) NAND flash memory bit errors. With program/erase …
contributors to multilevel cell (MLC) NAND flash memory bit errors. With program/erase …
A source and channel coding approach for improving flash memory endurance
The introduction of multiple-level cell (MLC) and triple-level cell (TLC) technologies reduced
the reliability of flash memories significantly compared with single-level cell flash. With MLC …
the reliability of flash memories significantly compared with single-level cell flash. With MLC …
Storage Reliability
J Shu - Data Storage Architectures and Technologies, 2024 - Springer
The rapid development of information technology has put data at the heart of modern
production, and data is now experiencing a period of tremendous growth. In 2019, the …
production, and data is now experiencing a period of tremendous growth. In 2019, the …