A Review of Recent Developments in “On-Chip” Embedded Cooling Technologies for Heterogeneous Integrated Applications

S Rangarajan, SN Schiffres, B Sammakia - Engineering, 2023 - Elsevier
The electronics packaging community strongly believes that Moore's law will continue for
another few years due to recent technological efforts to build heterogeneously integrated …

A study of tapered 3-D TSVs for power and thermal integrity

A Todri, S Kundu, P Girard, A Bosio… - … Transactions on Very …, 2012 - ieeexplore.ieee.org
3-D integration presents a path to higher performance, greater density, increased
functionality and heterogeneous technology implementation. However, 3-D integration …

Compact lateral thermal resistance model of TSVs for fast finite-difference based thermal analysis of 3-D stacked ICs

Z Liu, S Swarup, SXD Tan, HB Chen… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
Thermal issue is the leading design constraint for 3-D stacked integrated circuits (ICs) and
through silicon vias (TSVs) are used to effectively reduce the temperature of 3-D ICs …

A universal high-efficiency cooling structure for high-power integrated circuits☆

H Wang, Q Wu, C Wang, R Wang - Applied Thermal Engineering, 2022 - Elsevier
Nowadays, the growing number of electronic components in integrated circuit (IC) chips
require higher cooling efficiency. Here we propose a universal efficient cooling structure …

Scaling Limits, Challenges, and Opportunities in Embedded Cooling

S Rangarajan, SN Schiffres… - Embedded Cooling of …, 2024 - World Scientific
Many packaging experts believe Moore's law will hold for another decade due to recent
technological efforts to merge multiple integrated circuit dies horizontally and vertically into a …

Electrical–thermal characterization of through packaging vias in glass interposer

L Qian, Y **a, G Shi, J Wang, Y Ye… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Low-cost thin glass is developed as a promising material to advanced interposers for high
density electrical interconnection in 2.5-D and three-dimensional (3-D) integration. In this …

A predictive model for IC self-heating based on effective medium and image charge theories and its implications for interconnect and transistor reliability

W Ahn, H Zhang, T Shen, C Christiansen… - … on Electron Devices, 2017 - ieeexplore.ieee.org
Spatially resolved precise prediction of local temperature T (x, y, z) is essential to evaluate
Arrhenius-activated interconnect (eg, electromigration) and transistor reliability (eg, NBTI …

ELOFS: An Extensible Low-Overhead Flash File System for Resource-Scarce Embedded Devices

R Zhang, D Liu, X Chen, X She, C Yang… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
Emerging applications like machine learning in embedded devices (eg, satellites and
vehicles) require huge storage space, which recently stimulates the widespread deployment …

Thermal-aware modeling and analysis for a power distribution network including through-silicon-vias in 3-D ICs

W Zhu, G Dong, Y Yang - IEEE Transactions on Computer …, 2018 - ieeexplore.ieee.org
The high-power dissipation and the low-heat conduction between stacked chips in 3-D
structures lead to a high temperature, which has become a critical design constraint for high …

Nanoparticle optimization for enhanced targeted anticancer drug delivery

IM Chamseddine, M Kokkolaras - Journal of …, 2018 - asmedigitalcollection.asme.org
Nanoparticle (NP)-based drug delivery is a promising method to increase the therapeutic
index of anticancer agents with low median toxic dose. The delivery efficiency …