Abstract NoCs (Network on Chips) are the most popular interconnection mechanism used
for systems that require flexibility, extensibility and low power consumption. However …

Increasing fault rates in current and future technology nodes coupled with on-chip
components in the hundreds calls for robust and fault-tolerant Network-on-Chip (NoC) …

Adaptive routing techniques have been proven to be effective solutions for handling network
congestion and enhancing the performance of Network-on-Chip (NoC). Traditional adaptive …

Hybrid Wireless Network-on-Chip (HWNoC) architecture has been introduced as a
promising communication infrastructure for multicore systems. HWNoC-based multicore …

Network-on-chips (NoCs) are vulnerable to transient and permanent faults caused by
thermal violations, aging effects, component wear out, or even transient fault sources …

Future many-core processors will require high-performance yet energy-efficient on-chip
networks to provide a communication substrate for the continually increasing number of …

With the increasing of Network-on-Chip size, deterministic routing algorithms suffer from a
poor performance under heavy traffic. Therefore, routing schemes with varied candidate …

Fault-tolerant minimal routing algorithms aim at finding a Manhattan path between the
source and destination nodes and route around all faulty nodes. Additionally, some non …

Very-large-scale network-on-chip (VLS-NoC) has become a promising fabric for
supercomputers, but this fabric may encounter the many-fault problem. This article proposes …

Since several decades, fault tolerance has become a major research field due to transistor
shrinking and core number increasing in system-on-chip (SoC). Especially, faults occurring …