Use of diodes to enable μLoop® test structures for buried defects and voltage to grayscale calibration

OD Patterson - 25th Annual SEMI Advanced Semiconductor …, 2014 - ieeexplore.ieee.org
Two test structures that address key problems for voltage contrast inspection are introduced.
These structures both utilize diodes to provide unique capability. The first structure illustrates …

Microsphere-assisted hyperspectral imaging: super-resolution, non-destructive metrology for semiconductor devices

J Park, Y Choi, S Kwon, Y Lee, J Kim, J Kim… - Light: Science & …, 2024 - nature.com
As semiconductor devices shrink and their manufacturing processes advance, accurately
measuring in-cell critical dimensions (CD) becomes increasingly crucial. Traditional test …

Full-wafer voltage contrast inspection for detection of BEOL defects

RF Hafer, OD Patterson, R Hahn… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
This paper details an application where E-beam inspection (EBI) can be used for 100% full
wafer inspection, generally considered a mythical target for EBI. For process layers where …

Integrated circuit containing DOEs of NCEM-enabled fill cells

S Lam, D Ciplickas, T Brozek, J Cheng… - US Patent …, 2017 - Google Patents
2016-06-15 Assigned to PDF SOLUTIONS, INC. reassignment PDF SOLUTIONS, INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Mesh-style NCEM pads, and process for making semiconductor dies, chips, and wafers using in-line measurements from such pads

S Lam, D Ciplickas, T Brozek, J Cheng… - US Patent …, 2017 - Google Patents
2016-06-15 Assigned to PDF SOLUTIONS, INC. reassignment PDF SOLUTIONS, INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured …

S Lam, D Ciplickas, T Brozek, J Cheng… - US Patent …, 2017 - Google Patents
2017-01-02 Assigned to PDF SOLUTIONS, INC. reassignment PDF SOLUTIONS, INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Integrated circuit including NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between …

S Lam, D Ciplickas, T Brozek, J Cheng… - US Patent …, 2018 - Google Patents
2017-10-04 Assigned to PDF SOLUTIONS, INC. reassignment PDF SOLUTIONS, INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

In-line characterization of EDRAM for a FINFET technology using VC inspection

OD Patterson, R Hafer, S Mittal, A Arya… - 2016 27th Annual …, 2016 - ieeexplore.ieee.org
An E-beam voltage contrast inspection methodology involving multiple inspection points has
been created to support development of the EDRAM module for a recent FINFET …

Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells

S Lam, D Ciplickas, T Brozek, J Cheng… - US Patent …, 2020 - Google Patents
2016-06-15 Assigned to PDF SOLUTIONS, INC. reassignment PDF SOLUTIONS, INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

RIE-Induced VIA Defect Inspection Using In-line Voltage Contrast Technique–0.18 µm Technology

A Attri - IETE Journal of Research, 2024 - Taylor & Francis
Optical inspection is used in large-scale manufacturing processes to identify the pattern
defect. However, the capture rate of killer defects is low due to the resolution limit of optical …