Oversampling analog-to-digital converters (ADC) serve as the backbone of high-
performance, high-precision data interfaces, owing to their remarkable ability to filter out …

This paper presents an energy efficient two-step hybrid-domain successive approximation
register (SAR) analog-to-digital converter (ADC). Comparator offset calibration and kickback …

This paper presents variable resolution SAR ADC with digitally implemented Bit
enhancement logic. Unlike conventional approaches, this work avoids complex hardware …

This paper proposes a reconfigurable and energy-efficient 8-to-12-bit 10 MS/s analog-to-
digital-converter (ADC), which adopts the SAR-TDC architecture to enhance the power …

This paper presents a single bit continuous time delta-sigma modulator (CTDSM) with finite
impulse response (FIR) feedback DAC designed for audio applications. By using FIR …

Abstract AG MR amplifier is proposed as a residual amplifier to implement a 16-bit two-stage
non-pipelined ADC in intermittent signal acquisition applications. Unlike common capacitive …

This paper presents a 18-bit 1 MS/s fully-differential Successive-Approximation-Register
Analog-to-Digital Converter (SAR ADC) achieving an ENOB of 15.7-bit. To achieve higher …

A dual-mode low-power column parallel single-slope (SS) ADC incorporating Minimum
Voltage Feedback (MVF) is proposed for CMOS image sensors. When it works in low-power …

This paper introduces a discrete-time delta-sigma ADC for the Internet of Things (IoT)
applications. It utilizes second-order 4-bit successive approximation register (SAR) quantizer …

This paper presents a fourth-order sigma-delta (ΣΔ) ADC applied to a micro-electro-
mechanical system (MEMS) gyroscope system. First, a system-level model of ΣΔ modulator …