[PDF][PDF] An overview of reconfigurable hardware in embedded systems
Over the past few years, the realm of embedded systems has expanded to include a wide
variety of products, ranging from digital cameras, to sensor networks, to medical imaging …
variety of products, ranging from digital cameras, to sensor networks, to medical imaging …
[書籍][B] Reconfigurable computing: the theory and practice of FPGA-based computation
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …
between the separate worlds of hardware and software design—the key feature of …
[書籍][B] Three-dimensional integrated circuit design
Three-Dimensional Integrated Circuit Design, Second Eition, expands the original with more
than twice as much new content, adding the latest developments in circuit models …
than twice as much new content, adding the latest developments in circuit models …
AutoBridge: Coupling coarse-grained floorplanning and pipelining for high-frequency HLS design on multi-die FPGAs
Despite an increasing adoption of high-level synthesis (HLS) for its design productivity
advantages, there remains a significant gap in the achievable clock frequency between an …
advantages, there remains a significant gap in the achievable clock frequency between an …
RapidStream: parallel physical implementation of FPGA HLS designs
FPGAs require a much longer compilation cycle than conventional computing platforms like
CPUs. In this paper, we shorten the overall compilation time by co-optimizing the HLS …
CPUs. In this paper, we shorten the overall compilation time by co-optimizing the HLS …
Placement and routing in 3D integrated circuits
C Ababei, Y Feng, B Goplen, H Mogal… - IEEE Design & Test …, 2005 - ieeexplore.ieee.org
Three-dimension technologies offer great promise in providing improvements in the overall
circuit performance. Physical design plays a major role in the ability to exploit the flexibilities …
circuit performance. Physical design plays a major role in the ability to exploit the flexibilities …
UTPlaceF: A routability-driven FPGA placer with physical and congestion aware packing
Field programmable gate array (FPGA) packing and placement without routability
consideration could lead to unroutable results for high-utilization designs. Conventional …
consideration could lead to unroutable results for high-utilization designs. Conventional …
Interconnect-based design methodologies for three-dimensional integrated circuits
Design techniques for three-dimensional (3-D) ICs considerably lag the significant strides
achieved in 3-D manufacturing technologies. Advanced design methodologies for two …
achieved in 3-D manufacturing technologies. Advanced design methodologies for two …
Power estimation techniques for FPGAs
The dynamic power consumed by a digital CMOS circuit is directly proportional to both
switching activity and interconnect capacitance. In this paper, we consider early prediction of …
switching activity and interconnect capacitance. In this paper, we consider early prediction of …
HMFlow: Accelerating FPGA compilation with hard macros for rapid prototy**
C Lavin, M Padilla, J Lamprecht… - 2011 IEEE 19th …, 2011 - ieeexplore.ieee.org
The FPGA compilation process (synthesis, map, place, and route) is a time consuming task
that severely limits designer productivity. Compilation time can be reduced by saving …
that severely limits designer productivity. Compilation time can be reduced by saving …